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    • 1. 发明授权
    • Low supply voltage bandgap reference circuit and method
    • 低电压带隙参考电路和方法
    • US09086706B2
    • 2015-07-21
    • US13783423
    • 2013-03-04
    • Hong Kong Applied Science and Technology Research Institute Company Limited
    • Chi Fung LokLe Feng Shen
    • G05F3/20G05F3/02
    • G05F3/02G05F3/30
    • A circuit and method for a bandgap voltage reference operating at 1 volt or below is disclosed, wherein the operational amplifier (A1) drives resistors (R2, R3) only so that both the flicker noise contribution and the process sensitivity due to the conventional metal oxide semiconductor (MOS) devices used as a current mirror within the proportional-to-absolute-temperature (PTAT) loop are eliminated. Two symmetric resistive divider pairs formed by (R1A/R1B, R2A/R2B) are inserted to scale down both the base-emitter voltages (VEB1, VEB2) of bipolar transistors (Q1, Q2) and the PTAT current (IPTAT) so that an output reference voltage (VREF) becomes scalable. Proper bias currents through transistors (M3, M4), which are used to bias (Q1, Q2) and (R1A/R1B, R2A/R2B) respectively, are produced by an additional V-I converter (319) using VREF itself, resulting in a final process, voltage and temperature (PVT) insensitive output reference voltage.
    • 公开了一种用于1伏特或更低电压工作的带隙电压基准的电路和方法,其中运算放大器(A1)仅驱动电阻器(R2,R3),使得由于常规金属氧化物而引起的闪烁噪声贡献和处理灵敏度 消除了在比例绝对温度(PTAT)环路中用作电流镜的半导体(MOS)器件。 插入由(R1A / R1B,R2A / R2B)形成的两个对称电阻分压器对,以缩小双极晶体管(Q1,Q2)和PTAT电流(IPTAT)的基极 - 发射极电压(VEB1,VEB2) 输出参考电压(VREF)变得可扩展。 分别用于偏置(Q1,Q2)和(R1A / R1B,R2A / R2B)的晶体管(M3,M4)的适当偏置电流由另外的VI转换器(319)使用VREF本身产生,导致 最终过程,电压和温度(PVT)不敏感输出参考电压。
    • 2. 发明申请
    • LOW SUPPLY VOLTAGE BANDGAP REFERENCE CIRCUIT AND METHOD
    • 低电压带对准电路和方法
    • US20140247034A1
    • 2014-09-04
    • US13783423
    • 2013-03-04
    • Hong Kong Applied Science and Technology Research Institute Company Limited
    • Chi Fung LokLe Feng Shen
    • G05F3/02
    • G05F3/02G05F3/30
    • A circuit and method for a bandgap voltage reference operating at 1 volt or below is disclosed, wherein the operational amplifier (A1) drives resistors (R2, R3) only so that both the flicker noise contribution and the process sensitivity due to the conventional metal oxide semiconductor (MOS) devices used as a current mirror within the proportional-to-absolute-temperature (PTAT) loop are eliminated. Two symmetric resistive divider pairs formed by (R1A/R1B, R2A/R2B) are inserted to scale down both the base-emitter voltages (VEB1, VEB2) of bipolar transistors (Q1, Q2) and the PTAT current (IPTAT) so that an output reference voltage (VREF) becomes scalable. Proper bias currents through transistors (M3, M4), which are used to bias (Q1, Q2) and (R1A/R1B, R2A/R2B) respectively, are produced by an additional V-I converter (319) using VREF itself, resulting in a final process, voltage and temperature (PVT) insensitive output reference voltage.
    • 公开了一种用于1伏特或更低电压工作的带隙电压基准的电路和方法,其中运算放大器(A1)仅驱动电阻器(R2,R3),使得由于常规金属氧化物而引起的闪烁噪声贡献和处理灵敏度 消除了在比例绝对温度(PTAT)环路中用作电流镜的半导体(MOS)器件。 插入由(R1A / R1B,R2A / R2B)形成的两个对称电阻分压器对,以缩小双极晶体管(Q1,Q2)和PTAT电流(IPTAT)的基极 - 发射极电压(VEB1,VEB2) 输出参考电压(VREF)变得可扩展。 分别用于偏置(Q1,Q2)和(R1A / R1B,R2A / R2B)的晶体管(M3,M4)的适当偏置电流由另外的VI转换器(319)使用VREF本身产生,导致 最终过程,电压和温度(PVT)不敏感输出参考电压。