专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06281451B1 Electrical cable device 失效
标题翻译：电缆设备
公开(公告)号：US06281451B1
公开(公告)日：2001-08-28
申请号：US09160028
申请日：1998-09-24
申请人： Hong H. Chan , Qinglun Chen , Emile Joseph Tayar
发明人： Hong H. Chan , Qinglun Chen , Emile Joseph Tayar
IPC分类号： H01R1204
CPC分类号： H05K1/0219 , H01B7/0861 , H05K1/0393 , H05K2201/09236 , H05K2201/09618 , H05K2201/09672
摘要： An improved flexible cable construction is provided which includes two layers of conductor traces arranged alternately with three layers of dielectric material in a flattened configuration between ground plane outside metal surfaces. Each of the conductor layers includes alternating signal traces and ground traces. In an exemplary embodiment, vias are arranged in first and second planes through the cable. Longitudinal vias maintain the potential of ground planes at the same level as well as improving shielding effectiveness along an edge or thickness cross-section of the cable. Transverse vias are implemented to minimize antenna effects due to large openings at the point of cable entry into a sheet metal box containing high frequency electronics.
摘要翻译：提供了一种改进的柔性电缆结构，其包括交替地布置在接地平面外侧金属表面之间的扁平构造的三层电介质材料的两层导体迹线。每个导体层包括交替的信号迹线和接地迹线。在示例性实施例中，通孔通过电缆布置在第一和第二平面中。纵向通孔将地平面的潜力保持在同一水平，并提高沿着电缆的边缘或厚度横截面的屏蔽效果。实施横向通孔以最小化天线效应，这是由于电缆入口处含有高频电子元件的金属盒中的大开口。

2. 发明申请

US20150270838A1 PROGRAMMABLE EQUALIZATION WITH COMPENSATED IMPEDANCE 审中-公开
标题翻译：具有补偿阻力的可编程均衡
公开(公告)号：US20150270838A1
公开(公告)日：2015-09-24
申请号：US14727685
申请日：2015-06-01
申请人： Hong H. Chan , Jayson D. Strayer , My M. Hua
发明人： Hong H. Chan , Jayson D. Strayer , My M. Hua
IPC分类号： H03K19/00 , G11C7/10
CPC分类号： H03K19/0005 , G11C7/1048 , G11C7/1051 , H04L25/0278 , H04L25/0298
摘要： Described is a chip comprising: a pull-up driver with a first impedance, the pull-up driver coupled to a node; a pull-down driver with a second impedance, the pull-down driver coupled to the node; and an equalizer coupled to the pull-up and pull-down drivers, wherein the equalizer is operable to be trained to deemphasize a signal driven on the node while maintaining the first and second impedances substantially constant.
摘要翻译：描述了一种芯片，包括：具有第一阻抗的上拉驱动器，耦合到节点的上拉驱动器; 具有第二阻抗的下拉驱动器，所述下拉驱动器耦合到所述节点; 以及耦合到所述上拉和下拉驱动器的均衡器，其中所述均衡器可被操作以对所述节点上驱动的信号进行去加重，同时保持所述第一和第二阻抗基本上恒定。

3. 发明授权

US07148725B1 Voltage clamp 失效
标题翻译：电压钳
公开(公告)号：US07148725B1
公开(公告)日：2006-12-12
申请号：US10861138
申请日：2004-06-04
申请人： Hong H. Chan , Jeffrey E. Smith
发明人： Hong H. Chan , Jeffrey E. Smith
IPC分类号： H03K19/175
CPC分类号： H03K5/08
摘要： A pre-driver 102 has a data signal input 110 to receive a data signal, a pair of voltage inputs 103,107 to receive supply voltages, and a data output 135 to provide an output voltage. A voltage clamp 130 is connected between a predetermined one of the voltage inputs 103, 107 and the data output 135 to clamp the output voltage with respect to the predetermined supply voltage. Other embodiments and methods are also described and claimed.
摘要翻译：预驱动器102具有用于接收数据信号的数据信号输入端110，用于接收电源电压的一对电压输入端103,107以及提供输出电压的数据输出端135。电压钳130连接在预定的一个电压输入103,107和数据输出135之间，以相对于预定的电源电压钳位输出电压。还描述和要求保护其他实施例和方法。

4. 发明授权

US5764071A Method and system for testing an electronic module mounted on a printed circuit board 失效
标题翻译：用于测试安装在印刷电路板上的电子模块的方法和系统
公开(公告)号：US5764071A
公开(公告)日：1998-06-09
申请号：US583321
申请日：1996-01-05
申请人： Benson Chan , Hong H. Chan , Pratap Singh
发明人： Benson Chan , Hong H. Chan , Pratap Singh
IPC分类号： G01R1/04 , H05K3/32 , G01R31/02
CPC分类号： G01R1/0408 , H05K3/325
摘要： A method in system for the testing of the electrical characteristics of an electronic module mounted on a printed circuit board. The method and system monitors selected signals from the Bottom Signal Pads of the electronic module. Thus, eliminating the need for a prototype or specialized printed circuit board in order to perform desired testing of signals.
摘要翻译：一种用于测试安装在印刷电路板上的电子模块的电气特性的系统中的方法。该方法和系统监视来自电子模块的底部信号垫的选定信号。因此，为了执行期望的信号测试，不需要原型或专用印刷电路板。

5. 发明授权

US07005903B2 Output buffer with adjustment of signal transitions 失效
标题翻译：具有调整信号转换的输出缓冲器
公开(公告)号：US07005903B2
公开(公告)日：2006-02-28
申请号：US10726297
申请日：2003-12-02
申请人： Hong H. Chan , Jeffrey E. Smith , Yongping Fan , Prantik K. Nag
发明人： Hong H. Chan , Jeffrey E. Smith , Yongping Fan , Prantik K. Nag
IPC分类号： H03K5/12
CPC分类号： H03K19/00384
摘要： An output buffer generates an output signal having a plurality of low-to-high (LH) and high-to-low (HL) signal transitions, with each of the signal transitions having a clock-to-output delay. A pre-driver having a first and a second stage generates a reshaped waveform to trigger the LH and HL signal transitions of the output signal, with the first stage generating an initial waveform and the second stage modifying the initial waveform to generate the reshaped waveform based at least in part on a feedback reflective of a difference in the clock-to-output delays of the LH and HL signal transitions.
摘要翻译：输出缓冲器产生具有多个低到高（LH）和高到低（HL）信号转换的输出信号，其中每个信号转换具有时钟到输出延迟。具有第一和第二阶段的预驱动器产生重构波形以触发输出信号的LH和HL信号转换，其中第一级产生初始波形，第二级修改初始波形以产生基于重新形成的波形至少部分地基于反映LH和HL信号转换的时钟到输出延迟的差异的反馈。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式