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2. 发明授权

US06937513B1 Integrated NAND and nor-type flash memory device and method of using the same 有权
标题翻译：集成NAND和非型闪存器件及其使用方法
公开(公告)号：US06937513B1
公开(公告)日：2005-08-30
申请号：US10688023
申请日：2003-10-16
申请人： Geeta Desai , Vijendra Kuroodi , Remi Lenoir
发明人： Geeta Desai , Vijendra Kuroodi , Remi Lenoir
IPC分类号： G11C16/04 , G11C16/08
CPC分类号： G11C16/08
摘要： A semiconductor memory device is provided as well as a method for operating the semiconductor memory device. The memory device includes a NOR array of memory cells and a NAND array of memory cells configured on the same monolithic semiconductor substrate. Each cell of the NOR array involves a single transistor, similar to each cell of the NAND array. The memory device is, therefore, an integrated circuit that includes not only the NOR and NAND arrays, but also the row and column decoders corresponding to each array. Furthermore, the integrated circuit includes the interface circuitry needed to transfer information as pages into and from the NAND array. The corresponding interface or controller is implemented on the same monolithic substrate as both the NAND array and the NOR array. Addresses targeted for the NOR array are sent as fully memory-mapped data into the NOR array, whereas addresses targeted for the NAND array are sent through the controller integrated within the semiconductor memory device. The single transistor cell of both the NAND array and NOR array preferably involves a flash EEPROM-type transistor that implements a floating gate dielectrically spaced between a control gate and the semiconductor substrate.
摘要翻译：提供半导体存储器件以及用于操作半导体存储器件的方法。存储器件包括存储器单元的NOR阵列和配置在同一单片半导体衬底上的存储器单元的NAND阵列。 NOR阵列的每个单元涉及单个晶体管，类似于NAND阵列的每个单元。因此，存储器件是不仅包括NOR和NAND阵列，而且包括对应于每个阵列的行和列解码器的集成电路。此外，集成电路包括将页面传送到NAND阵列中的页面所需的接口电路。相应的接口或控制器在与NAND阵列和NOR阵列同样的单片基板上实现。 NOR阵列的目标地址作为完全存储器映射的数据发送到NOR阵列，而通过集成在半导体存储器件中的控制器发送针对NAND阵列的地址。 NAND阵列和NOR阵列的单个晶体管单元优选地涉及实现在控制栅极和半导体衬底之间介电间隔开的浮动栅极的快闪EEPROM型晶体管。

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