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    • 3. 发明授权
    • Temperature compensating thin-film capacitor
    • 温度补偿薄膜电容器
    • US06477036B2
    • 2002-11-05
    • US09930862
    • 2001-08-16
    • Hitoshi KitagawaMakoto Sasaki
    • Hitoshi KitagawaMakoto Sasaki
    • H01G420
    • H01G4/20H01L28/40
    • The present invention provides a thin-film capacitor which can easily meet requirements of reduction in size, thickness, and weight and which can perform temperature compensation. In addition to the features described above, the present invention provides a thin-film capacitor having a superior Q factor in a high frequency band. The thin-film capacitor of the present invention has at least one first dielectric thin-film and at least one second dielectric thin-film having a dielectric constant different from that of the first dielectric thin-film, wherein these thin-films are provided between a pair of electrodes. In addition, in the present invention, the absolute value of the temperature coefficient of capacitance of the first dielectric thin-film is 50 ppm/° C. or less, and the temperature coefficient of capacitance of the second dielectric thin-film is a negative value and has an absolute value of 500 ppm/° C. or more.
    • 本发明提供一种能够容易地满足尺寸,厚度,重量的要求的薄膜电容器,能够进行温度补偿。 除了上述特征之外,本发明提供了一种在高频带中具有优异Q因子的薄膜电容器。 本发明的薄膜电容器具有至少一个第一电介质薄膜和至少一个具有与第一介电薄膜不同的介电常数的第二电介质薄膜,其中这些薄膜位于 一对电极。 此外,在本发明中,第一电介质薄膜的电容温度系数的绝对值为50ppm /℃以下,第二电介质薄膜的电容温度系数为负 值,绝对值为500ppm /℃以上。
    • 4. 发明授权
    • Thin-film capacitor device
    • 薄膜电容器件
    • US06747334B2
    • 2004-06-08
    • US10452246
    • 2003-05-30
    • Hitoshi KitagawaMakoto Sasaki
    • Hitoshi KitagawaMakoto Sasaki
    • H01L2900
    • H01L28/56H01L27/0805
    • A thin-film capacitor device for performing temperature compensation is manufactured by layering a first dielectric thin-film and a second dielectric thin-film, wherein the second dielectric thin-film has a thickness tN, wherein tN={&egr;0&tgr;t0t/(C/S)}·{1/(&tgr;/&kgr;)}, wherein C/S represents a sheet capacitance, &egr;0 represents the dielectric constant of vacuum, &tgr;t0t represents a desired temperature coefficient of capacitance, &tgr; represents the temperature coefficient of capacitance of the second dielectric thin-film, and &kgr; represents the relative dielectric constant of the second dielectric thin-film, a target value of a grain size of the second dielectric thin-film is determined by selecting the grain size satisfying the formula (&tgr;/&kgr;)/(&tgr;g/&kgr;g)>1, wherein &tgr;g represents the temperature coefficient of capacitance of the principal crystal grain, and &kgr;g represents relative dielectric constant of the principal crystal grain, and the second dielectric thin-film is deposited so that the grain size becomes the target value.
    • 通过层叠第一电介质薄膜和第二电介质薄膜来制造用于进行温度补偿的薄膜电容器器件,其中第二介电薄膜具有厚度t N,其中tN = {ε0t0Ot/(C / S )}。{1 /(tau / kappa)},其中C / S表示薄膜电容,ε表示真空的介电常数,taut表示期望的电容温度系数,τ表示第二电介质的电容温度系数 薄膜和κ表示第二电介质薄膜的相对介电常数,通过选择满足公式(tau / kappa)/(τ)的晶粒尺寸来确定第二电介质薄膜的晶粒尺寸的目标值 taug / kappag)> 1,其中taug表示主晶粒的电容温度系数,kappag表示主晶粒的相对介电常数,第二介电薄膜 沉积,使得晶粒尺寸成为目标值。
    • 5. 发明授权
    • Thin-film-transistor-array substrate and liquid-crystal display device
    • 薄膜晶体管阵列基板和液晶显示装置
    • US06274886B1
    • 2001-08-14
    • US09385391
    • 1999-08-30
    • Makoto SasakiHitoshi Kitagawa
    • Makoto SasakiHitoshi Kitagawa
    • H01L2900
    • G02F1/136227H01L29/78669
    • In a thin-film-transistor-array substrate, a plurality of gate wires and a plurality of source wires are provided on the substrate to form a matrix; a pixel is formed on each of a plurality of areas each enclosed by two adjacent ones of the gate wires and two adjacent ones of the source wires; the pixel includes a thin-film-transistor having: a gate electrode formed as a portion of the gate wire; a source electrode formed as a portion of the source wire; and a drain electrode connected to a pixel electrode formed on an insulation layer covering the gate electrode, the gate wire, the source electrode and the source wire through a contact hole formed by boring the insulation layer, and a dummy hole is formed by boring a portion of the insulation film above at least one of the gate electrode, the gate wire, the source electrode and the source wire in close proximity to the contact hole with the dummy hole reaching the gate electrode, the gate wire, the source electrode or the source wire respectively.
    • 在薄膜晶体管阵列基板中,在基板上设置多条栅极布线和多条源极线,形成矩阵; 在由两个相邻的栅极线和两个相邻的源极线围绕的多个区域中的每一个上形成像素; 像素包括具有:形成为栅极线的一部分的栅电极的薄膜晶体管; 形成为所述源极线的一部分的源电极; 以及漏极,其与形成在覆盖所述栅极电极,所述栅极线,所述源极电极以及所述源极配线的绝缘层上形成的像素电极连接,所述绝缘层通过使所述绝缘层开孔而形成的接触孔而形成, 栅极线,源电极和源极线中的至少一个上的绝缘膜的与绝缘孔接近的接触孔的绝缘膜的部分,虚拟孔到达栅电极,栅极线,源电极或源极 源线分别。