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1. 发明申请

US20080125284A1 HYDRAULIC PRESSURE CONTROL DEVICE FOR CONTINUOUSLY VARIABLE TRANSMISSION 有权
标题翻译：用于连续变速传动的液压控制装置
公开(公告)号：US20080125284A1
公开(公告)日：2008-05-29
申请号：US11941132
申请日：2007-11-16
申请人： Hiroyasu TANAKA , Hideshi WAKAYAMA , Shoichi SEKIGUCHI , Katsumi DOIHARA , Hideaki SASAKI , Azusa SHIMODA , Naohiro HOSHI , Tatsuya OZONE , Toshio SAITOU , Koji DOHI
发明人： Hiroyasu TANAKA , Hideshi WAKAYAMA , Shoichi SEKIGUCHI , Katsumi DOIHARA , Hideaki SASAKI , Azusa SHIMODA , Naohiro HOSHI , Tatsuya OZONE , Toshio SAITOU , Koji DOHI
IPC分类号： B60W10/02
CPC分类号： F16H61/20 , F16D48/066 , F16D2500/1026 , F16D2500/3024 , F16D2500/30426 , F16D2500/50254 , F16D2500/50272 , F16H59/42 , F16H61/662 , F16H2061/0087 , F16H2061/207 , F16H2342/042 , Y10T477/6203 , Y10T477/6237 , Y10T477/624 , Y10T477/753 , Y10T477/78
摘要： A hydraulic pressure control device is provided that that controls hydraulic pressure of a clutch supplying torque to a continuously variable transmission while the vehicle is stopped and in a running range. The hydraulic pressure control device has an control section that estimates a clutch engagement hydraulic pressure for changing the clutch from an engaged state to a disengaged state based the hydraulic fluid pressure acting on the clutch during the stopping of the rotational movement of a primary pulley of the continuously variable transmission, and then controls regulation of the hydraulic pressure to the clutch from an engaged state to a disengaged state, when the vehicle is stopped and in the running range, so that the torque from the engine does not rotate a secondary pulley of the continuously variable transmission.
摘要翻译：提供了一种液压控制装置，其在车辆停止时和在行驶范围内将离合器供给扭矩的液压控制在无级变速器上。液压控制装置具有控制部，该控制部基于在停止第一带轮的旋转运动期间基于作用在离合器上的液压流体压力来估计用于将离合器从接合状态改变到分离状态的离合器接合液压无级变速器，然后当车辆停止并处于行驶范围时，控制离合器的液压从接合状态到分离状态的调节，使得来自发动机的扭矩不会使第二皮带轮无级变速器。

2. 发明申请

US20080269012A1 HYDRAULIC PRESSURE CONTROL DEVICE FOR CONTINUOUSLY VARIABLE TRANSMISSION 审中-公开
标题翻译：用于连续变速传动的液压控制装置
公开(公告)号：US20080269012A1
公开(公告)日：2008-10-30
申请号：US11876985
申请日：2007-10-23
申请人： Hiroyasu TANAKA , Hideshi WAKAYAMA , Shoichi SEKIGUCHI , Yasuhiro TANI , Shinichi ARISAWA , Toshio SAITOU , Takashi FUKAGAWA , Takuichiro INOUE
发明人： Hiroyasu TANAKA , Hideshi WAKAYAMA , Shoichi SEKIGUCHI , Yasuhiro TANI , Shinichi ARISAWA , Toshio SAITOU , Takashi FUKAGAWA , Takuichiro INOUE
IPC分类号： F16H61/00
CPC分类号： F16H61/061 , F16H61/20 , F16H61/662 , F16H2061/0087 , F16H2061/064 , F16H2061/207 , F16H2312/14 , F16H2342/04 , F16H2342/042 , Y10T477/624
摘要： A hydraulic pressure control device is provided that that controls hydraulic pressure of a clutch supplying torque to a continuously variable transmission while the vehicle is stopped and in a running range. The hydraulic pressure control device has an control section that estimates a clutch engagement hydraulic pressure for the clutch based on initially rotational movement of a primary pulley of the continuously variable transmission, and then controls regulation of the hydraulic pressure to the clutch to a designated pressure that is no greater than the clutch engagement hydraulic pressure, when the vehicle is stopped and in the running range, so that the torque from the engine does not rotate a secondary pulley of the continuously variable transmission.
摘要翻译：提供了一种液压控制装置，其在车辆停止时和在行驶范围内将离合器供给扭矩的液压控制在无级变速器上。液压控制装置具有控制部，其基于无级变速器的初级带轮的初始旋转运动来估计离合器的离合器接合液压，然后将对离合器的液压的调节控制到规定的压力，不超过离合器接合液压，当车辆停止并处于行驶范围时，使得来自发动机的转矩不转动无级变速器的次级带轮。

3. 发明申请

US20110316069A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20110316069A1
公开(公告)日：2011-12-29
申请号：US12886010
申请日：2010-09-20
申请人： Hiroyasu TANAKA , Ryota KATSUMATA
发明人： Hiroyasu TANAKA , Ryota KATSUMATA
IPC分类号： H01L29/792
CPC分类号： H01L27/11551 , H01L27/11526 , H01L27/11548 , H01L27/11556 , H01L29/66825 , H01L29/7889
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a memory unit and a non-memory unit. The memory unit includes a stacked structure including electrode films stacked in a first direction, and a interelectrode insulating film provided between the electrode films, a select gate electrode stacked with the stacked structure along the first direction, a semiconductor pillar piercing the stacked structure and the select gate electrode along the first direction and a pillar portion memory layer provided between the electrode films and the semiconductor pillar. The non-memory unit includes a dummy conductive film including a portion in a layer being identical to at least one of the electrode films, a dummy select gate electrode in a layer being identical to the select gate electrode, a first non-memory unit contact electrode electrically connected to the dummy conductive and a second non-memory unit contact electrode electrically connected to the dummy select gate.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括存储器单元和非存储器单元。存储单元包括堆叠结构，其包括在第一方向上堆叠的电极膜，以及设置在电极膜之间的电极间绝缘膜，沿着第一方向堆叠层叠结构的选择栅电极，穿过层叠结构的半导体柱和沿着第一方向选择栅电极和设置在电极膜和半导体柱之间的柱部存储层。非存储单元包括虚拟导电膜，其包括与至少一个电极膜相同的层中的部分，与选择栅电极相同的层中的虚拟选择栅电极，第一非存储单元触点电连接到虚拟导电体的电极和与虚拟选择栅极电连接的第二非存储单元接触电极。

4. 发明申请

US20100219465A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100219465A1
公开(公告)日：2010-09-02
申请号：US12773038
申请日：2010-05-04
申请人： Hiroyasu TANAKA , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
发明人： Hiroyasu TANAKA , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
IPC分类号： H01L29/78
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/0649 , H01L29/7923 , H01L29/7926
摘要： A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.
摘要翻译：半导体器件具有衬底，形成在衬底的表面部分上的源极区域，形成在衬底上的第一绝缘层，形成在第一绝缘层上的栅电极，形成在栅电极上的第二绝缘层，主体与源极区域连接，穿过第一绝缘层，栅电极和第二绝缘层，并且包含空隙，围绕主体部分的栅极绝缘膜，并且形成在主体部分和栅电极之间，并且漏极区域与主体部分连接。

5. 发明申请

US20100075799A1 CONTINUOUSLY VARIABLE TRANSMISSION AND CONTROL METHOD THEREOF 审中-公开
标题翻译：连续可变传输及其控制方法
公开(公告)号：US20100075799A1
公开(公告)日：2010-03-25
申请号：US12558139
申请日：2009-09-11
申请人： Hideaki SUZUKI , Ryousuke NONOMURA , Hiroyasu TANAKA , Takuichiro INOUE , Mamiko INOUE
发明人： Hideaki SUZUKI , Ryousuke NONOMURA , Hiroyasu TANAKA , Takuichiro INOUE , Mamiko INOUE
IPC分类号： F16H55/52 , F16H61/662
CPC分类号： F16H37/021 , F16H61/0437 , F16H61/66259 , F16H2037/023 , F16H2037/025 , F16H2061/6614 , Y10T477/619 , Y10T477/6217 , Y10T477/6237
摘要： When a through speed ratio, which is an overall speed ratio of a variator and a subtransmission mechanism, varies from a larger speed ratio than a mode switch speed ratio to a smaller speed ratio than the mode switch speed ratio, a gear position of the subtransmission mechanism is changed from a first gear position to a second gear position. The mode switch speed ratio is set at a through speed ratio obtained when the speed ratio of the variator is a Highest speed ratio and the gear position of the subtransmission mechanism is the first gear position.
摘要翻译：当作为变速器和副变速机构的总变速比的贯穿变速比从比模式切换变速比变大到比模式切换变速比小的变速比时，副变速器的档位机构从第一档位改变到第二档位。当变速器的变速比为最高变速比时，模式切换速比被设定为通过变速比，并且副变速机构的档位是第一档位。

6. 发明申请

US20100052042A1 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100052042A1
公开(公告)日：2010-03-04
申请号：US12561451
申请日：2009-09-17
申请人： Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI , Masaru KIDO , Masaru KITO , Mitsuru SATO
发明人： Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI , Masaru KIDO , Masaru KITO , Mitsuru SATO
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L21/8221 , H01L27/0688 , H01L27/105 , H01L27/11548 , H01L27/11551 , H01L27/11556 , H01L27/11575 , H01L27/11578 , H01L27/11582 , H01L29/7881 , H01L29/7926
摘要： The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line.
摘要翻译：本发明的半导体存储器件包括具有串联连接的多个电可再编程存储器单元的多个存储器串，具有列形半导体的存储器串，形成在柱状半导体周围的第一绝缘膜，电荷累积层形成在第一绝缘膜周围，形成在电荷累积膜周围的第二绝缘膜和围绕第二绝缘膜形成的多个电极，经由多个选择晶体管连接到存储器串的一端的位线，以及导电分别在存储器串的多个电极和不同的存储器串的多个电极中分别共享，其中导电层的每个端部在平行于位线的方向上形成为台阶形状。

7. 发明申请

US20090294844A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20090294844A1
公开(公告)日：2009-12-03
申请号：US12132181
申请日：2008-06-03
申请人： Hiroyasu TANAKA , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
发明人： Hiroyasu TANAKA , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
IPC分类号： H01L29/739
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/0649 , H01L29/7923 , H01L29/7926
摘要： A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.
摘要翻译：半导体器件具有衬底，形成在衬底的表面部分上的源极区域，形成在衬底上的第一绝缘层，形成在第一绝缘层上的栅电极，形成在栅电极上的第二绝缘层，主体与源极区域连接，穿过第一绝缘层，栅电极和第二绝缘层，并且包含空隙，围绕主体部分的栅极绝缘膜，并且形成在主体部分和栅电极之间，并且漏极区域与主体部分连接。

8. 发明申请

US20130109157A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20130109157A1
公开(公告)日：2013-05-02
申请号：US13723601
申请日：2012-12-21
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Megumi ISHIDUKI , Yosuke KOMORI , Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Megumi ISHIDUKI , Yosuke KOMORI , Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L27/0688 , H01L27/11551 , H01L27/11556 , H01L29/7881
摘要： A non-volatile semiconductor storage device includes a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprising: a first semiconductor layer including a columnar portion extending in a vertical direction with respect to a substrate; a plurality of first conductive layers formed to surround side surfaces of the columnar portions via insulation layers, and formed at a certain pitch in the vertical direction, the first conductive layers functioning as floating gates of the memory cells; and a plurality of second conductive layers formed to surround the first conductive layers via insulation layers, and functioning as control electrodes of the memory cells. Each of the first conductive layers has a length in the vertical direction that is shorter than a length in the vertical direction of each of the second conductive layers.
摘要翻译：非挥发性半导体存储装置包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元。每个存储器串包括：第一半导体层，包括相对于衬底在垂直方向上延伸的柱状部分; 多个第一导电层，经由绝缘层形成为围绕柱状部分的侧表面，并以垂直方向上的一定间距形成，第一导电层用作存储器单元的浮动栅极; 以及形成为经由绝缘层包围第一导电层并且用作存储单元的控制电极的多个第二导电层。每个第一导电层在垂直方向上具有比每个第二导电层的垂直方向上的长度短的长度。

9. 发明申请

US20120218821A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：非挥发性半导体存储器件
公开(公告)号：US20120218821A1
公开(公告)日：2012-08-30
申请号：US13463889
申请日：2012-05-04
申请人： Kiyotaro ITAGAKI , Yoshihisa IWATA , Hiroyasu TANAKA , Masaru KIDOH , Masaru KITO , Ryota KATSUMATA , Hideaki AOCHI , Akihiro NITAYAMA , Takashi MAEDA , Tomoo HISHIDA
发明人： Kiyotaro ITAGAKI , Yoshihisa IWATA , Hiroyasu TANAKA , Masaru KIDOH , Masaru KITO , Ryota KATSUMATA , Hideaki AOCHI , Akihiro NITAYAMA , Takashi MAEDA , Tomoo HISHIDA
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/08 , G11C16/16 , G11C16/26 , G11C16/30
摘要： A non-volatile semiconductor storage device includes: a memory string including a plurality of memory cells connected in series; a first selection transistor having one end connected to one end of the memory string; a first wiring having one end connected to the other end of the first selection transistor; a second wiring connected to a gate of the first selection transistor. A control circuit is configured to boost voltages of the second wiring and the first wiring in the erase operation, while keeping the voltage of the first wiring greater than the voltage of the second wiring by a certain potential difference. The certain potential difference is a potential difference that causes a GIDL current.
摘要翻译：非易失性半导体存储装置包括：包括串联连接的多个存储单元的存储串; 第一选择晶体管，其一端连接到存储器串的一端; 第一布线，其一端连接到第一选择晶体管的另一端; 连接到第一选择晶体管的栅极的第二布线。控制电路被配置为在保持第一布线的电压大于第二布线的电压一定电位差的同时，在擦除操作中提高第二布线和第一布线的电压。一定的电位差是导致GIDL电流的电位差。

10. 发明申请

US20120135593A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120135593A1
公开(公告)日：2012-05-31
申请号：US13366509
申请日：2012-02-06
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided with a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of the pair of columnar portions; a charge storage layer formed so as to surround a side surface of the columnar portions; and a first conductive layer formed so as to surround the side surface of the columnar portions and the charge storage layer, and configured to function as a control electrode of the memory cells. Each of the select transistors is provided with a second semiconductor layer extending upwardly from an upper surface of the columnar portions; and a second conductive layer formed so as to surround a side surface of the second semiconductor layer with a gap interposed, and configured to function as a control electrode of the select transistors.
摘要翻译：非易失性半导体存储器件包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元; 并选择晶体管，其中一个连接到每个存储器串的每一端。每个存储器串都具有第一半导体层，该第一半导体层具有相对于基板在垂直方向上延伸的一对柱状部分，以及形成为连接该一对柱状部分的下端的接合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分的侧面和电荷存储层的第一导电层，并且被配置为用作存储单元的控制电极。每个选择晶体管设置有从柱状部分的上表面向上延伸的第二半导体层; 以及第二导电层，其被形成为以间隔开的方式围绕所述第二半导体层的侧表面，并且被配置为用作所述选择晶体管的控制电极。

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