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1. 发明授权

US4721788A 4-cyanopiperidine derivatives 失效
标题翻译： 4-氰基哌啶衍生物
公开(公告)号：US4721788A
公开(公告)日：1988-01-26
申请号：US883697
申请日：1986-07-08
申请人： Hiroshi Yamauchi , Seiichiro Nomoto , Isao Sugiyama , Yuuki Komatu , Takeo Kanai , Keizo Takayanagi , Yasuhide Tanaka , Atsushi Koiwa , Shinichi Endoh
发明人： Hiroshi Yamauchi , Seiichiro Nomoto , Isao Sugiyama , Yuuki Komatu , Takeo Kanai , Keizo Takayanagi , Yasuhide Tanaka , Atsushi Koiwa , Shinichi Endoh
IPC分类号： C07D211/62 , C07D453/02 , C07D211/26
CPC分类号： C07D453/02 , C07D211/62
摘要： A novel 4-cyanopiperidine derivative, which is represented by the following general formula (I): ##STR1## wherein X means a halogen atom, or an acid addition salt thereof, is prepared by reacting N-(2-hydroxyethyl)-4-carbamoylpiperidine or an acid addition salt thereof with a dehydrating and halogenating agent; or by reacting 4-cyanopiperidine or a salt thereof with a compound represented by the following general formula (IV):X--CH.sub.2 CH.sub.2 --Y (IV)wherein X has the same meaning as defined above and Y denotes the same halogen atom as X or another halogen atom. The derivative is useful as intermediate for synthesis of quinuclidine derivative which is in turn useful as intermediate for the production of medicines, chemicals, etc.
摘要翻译：由下列通式（I）表示的新颖的4-氰基哌啶衍生物：其中X表示卤素原子或其酸加成盐的方法是通过使N-（2-羟基乙基） -4-氨基甲酰基哌啶或其酸加成盐与脱水和卤化剂反应; 或通过使4-氰基哌啶或其盐与下述通式（IV）表示的化合物反应：X-CH 2 CH 2 -Y（IV）其中X具有与上述相同的含义，Y表示与X相同的卤素原子或另一个卤素原子。该衍生物可用作合成奎宁环衍生物的中间体，其可用作药物，化学品等的生产中间体。

2. 发明授权

US4331606A N-(Substituted chromone-3-carbonyl)-phenylglycine derivatives 失效
标题翻译： N-（取代的色酮-3-羰基） - 苯基甘氨酸衍生物
公开(公告)号：US4331606A
公开(公告)日：1982-05-25
申请号：US218404
申请日：1980-12-19
申请人： Seiichiro Nomoto , Hironori Ikuta , Yoshimasa Machida , Shigeto Negi , Isao Sugiyama , Hiroshi Yamauchi , Takeo Kanai , Isao Saito
发明人： Seiichiro Nomoto , Hironori Ikuta , Yoshimasa Machida , Shigeto Negi , Isao Sugiyama , Hiroshi Yamauchi , Takeo Kanai , Isao Saito
IPC分类号： C07D311/22 , C07D501/36 , C07D311/24
CPC分类号： C07D311/22
摘要： N-(Substituted chromone-3-carbonyl)phenylglycine derivatives. These derivatives are useful intermediates for cephem compounds which are excellent as antibacterial agents.
摘要翻译： N-（取代的色酮-3-羰基）苯基甘氨酸衍生物。这些衍生物是作为抗菌剂优异的头孢烯化合物的有用的中间体。

3. 发明授权

US4433142A Process for the preparation of 7-(2-amino-2-phenylacetamido) cephem derivatives 失效
标题翻译： 7-（2-氨基-2-苯乙酰氨基）头孢烯衍生物的制备方法
公开(公告)号：US4433142A
公开(公告)日：1984-02-21
申请号：US376214
申请日：1982-05-07
申请人： Keizo Takayanagi , Yasuhide Tanaka , Tasuke Kawabata , Fujio Nakamura , Yukio Morita , Shigeto Negi , Takeo Kanai , Eiichi Morita
发明人： Keizo Takayanagi , Yasuhide Tanaka , Tasuke Kawabata , Fujio Nakamura , Yukio Morita , Shigeto Negi , Takeo Kanai , Eiichi Morita
IPC分类号： C07D501/06 , A61K31/545 , C07D501/04 , C07D501/36
CPC分类号： C07D501/36
摘要： Improved process for the preparation of 7-(2-amino-2-phenyl-acetamido)cephem derivatives of the general formula (I): ##STR1## wherein R.sub.1 is a hydrogwn atom or hydroxyl group, n stands for 0, 1 or 2, and A denotes a nitrogen-containing heterocyclic group or a direct bond coupling directly the sulfur atom and the --(CH.sub.2).sub.n COOH group together, as well as pharmaceutically acceptable salts thereof. The process is not only simple and easy to carry out, but also provides as crystalline precipitate the intended products with a high yield. The 7-(2-amino-2-phenyl-acetamido)cephem derivatives are useful as intermediates for syntheses of antibacterial agents.
摘要翻译：用于制备通式（I）的7-（2-氨基-2-苯基 - 乙酰氨基）头孢烯衍生物的改进方法：其中R1是氢原子或羟基，n代表0,1或2 ，A表示含氮杂环基团或直接与硫原子和 - （CH 2）n COOH基团偶联的直接键，以及其药学上可接受的盐。该方法不仅简单易操作，而且可以以高产率提供目标产物的结晶沉淀。 7-（2-氨基-2-苯基 - 乙酰氨基）头孢烯衍生物可用作合成抗菌剂的中间体。

4. 发明授权

US4285941A Cephalosporin compounds and antibacterial drugs containing the same 失效
标题翻译：头孢菌素化合物和含有相同的抗菌药物
公开(公告)号：US4285941A
公开(公告)日：1981-08-25
申请号：US142160
申请日：1980-04-14
申请人： Yoshimasa Machida , Isao Saito , Seiichiro Nomoto , Shigeto Negi , Takeo Kanai , Kyosuke Kitoh , Kanemasa Katsu , Yukio Ohya , Takeshi Nagasu
发明人： Yoshimasa Machida , Isao Saito , Seiichiro Nomoto , Shigeto Negi , Takeo Kanai , Kyosuke Kitoh , Kanemasa Katsu , Yukio Ohya , Takeshi Nagasu
IPC分类号： C07D501/06 , A61K31/545 , A61K31/546 , A61P31/04 , C07D311/22 , C07D501/36
CPC分类号： C07D311/22
摘要： Novel cephalosporin compounds of the general formula: ##STR1## wherein R.sub.1 represents a substituted or unsubstituted nitrogen-containing heterocyclic-thio group, R.sub.2 represents hydrogen or hydroxy, and R.sub.3, R.sub.4 and R.sub.5 each represents hydrogen, hydroxy or acyloxy, and their salts, and processes for the preparation thereof. The novel compounds and their salts have antibacterial activity.
摘要翻译：新型头孢菌素化合物，其通式如下：其中R 1表示取代或未取代的含氮杂环硫基，R 2表示氢或羟基，R 3，R 4和R 5各自表示氢，羟基或酰氧基，及其制备方法。新化合物及其盐具有抗菌活性。

5. 发明授权

US07215179B2 Booster circuit 失效
标题翻译：增压电路
公开(公告)号：US07215179B2
公开(公告)日：2007-05-08
申请号：US10535102
申请日：2003-09-26
申请人： Takanori Yamazoe , Takeo Kanai
发明人： Takanori Yamazoe , Takeo Kanai
IPC分类号： G05F1/10
CPC分类号： G11C5/146 , G11C5/145 , H02M3/073 , H02M2001/009 , H02M2003/071 , H02M2003/075 , H02M2003/076
摘要： The present invention relates to a booster circuit of a non-volatile memory requiring a plus or minus high voltage equal to or higher than a power-supply voltage. The present invention can generate a high voltage of approximately 12 V even at a low power-supply voltage equal to or lower than 3 V and generate not only a plus high voltage but also a minus high voltage by the same circuit. Also, by combining a body-controlled type parallel charge pump, which is a booster circuit according to the present invention, with a serial-type charge pump, two types of high voltages can be efficiently generated and a reduction in chip areas can be achieved.
摘要翻译：本发明涉及一种非易失性存储器的升压电路，其需要等于或高于电源电压的正或负高电压。本发明即使在等于或低于3V的低电源电压下也可产生大约12V的高电压，并且不仅通过相同电路产生正高电压而且产生负高电压。此外，通过将根据本发明的升压电路的身体控制型并联电荷泵与串联型电荷泵组合，可以有效地产生两种类型的高电压，并且可以实现芯片面积的减少。

6. 发明授权

US06271708B1 Gate circuit 有权
标题翻译：门电路
公开(公告)号：US06271708B1
公开(公告)日：2001-08-07
申请号：US09368162
申请日：1999-08-05
申请人： Kimihiro Hoshi , Takeo Kanai
发明人： Kimihiro Hoshi , Takeo Kanai
IPC分类号： H03K1704
CPC分类号： H03K17/164 , H03K17/168 , H03K17/567
摘要： In a gate circuit having a turn-off gate circuit composed of: OFF gate power source Eoff of which one terminal is connected to the emitter of semiconductor switching element 81, and switch SWoff that connects the other terminal of OFF gate power source Eoff and the gate of semiconductor switching element S1 via resistor Rg, the gate circuit is provided with second switch SWoff2 that connects the other terminal of OFF gate power source Eoff and the gate of semiconductor switching element S1. By closing second switch SWoff2 at the timing at which the turn-off operation is completed, it will connect to OFF gate power source Eoff without passing through a resistor.
摘要翻译：在具有截止门电路的门电路中，包括：一个端子连接到半导体开关元件81的发射极的OFF栅极电源Eoff和将OFF栅极电源Eoff的另一个端子和通过电阻器Rg的半导体开关元件S1的栅极，栅极电路设置有连接关闭栅极电源Eoff的另一端子和半导体开关元件S1的栅极的第二开关SWoff2。通过在关断操作完成的定时关闭第二开关SWoff2，它将连接到OFF栅极电源Eoff而不通过电阻器。

7. 发明授权

US5631378A Protected aminothiazolylacetic acid derivatives 失效
公开(公告)号：US5631378A
公开(公告)日：1997-05-20
申请号：US591022
申请日：1996-01-25
申请人： Yoshio Urawa , Akihiko Shimotani , Takeo Kanai , Masahiko Tsujii
发明人： Yoshio Urawa , Akihiko Shimotani , Takeo Kanai , Masahiko Tsujii
IPC分类号： C07D277/20 , C07D277/38 , C07D277/40 , C07D277/42 , C07D499/08 , C07D501/00 , C07D501/06 , C07D501/34
CPC分类号： C07D277/587 , C07D277/20 , C07D277/42 , C07D501/00 , Y02P20/55
摘要： Described is a protected aminothiazolylacetic acid derivative represented by the following formula (I): ##STR1## wherein A represents a nitrogen atom or a methine group, R.sup.1 and R.sup.2 may be the same or different and individually represent a hydrogen atom, a lower alkyl group or a substituted or unsubstituted aryl group, R.sup.3 represents a lower alkoxy group, a halogenated lower alkoxy group, a triphenylmethoxy group, a lower alkyl group or an acyloxy group, and R.sup.4 represents a halogen atom, a hydroxy group, a lower alkoxy group or a substituted or unsubstituted amino group; and salts thereof; as well as processes for the preparation thereof. The protected aminothaizolylacetic acid derivative according to the present invention is an useful intermediate for introducing a 2-(2-aminothiazol-4-yl)-2-alkoxyiminoacetyl group or a 2-(2-aminotiazol-4-yl)-2-alkenoyl group into a cephem skeleton.

8. 发明授权

US08050085B2 Semiconductor processing device and IC card 有权
标题翻译：半导体处理装置和IC卡
公开(公告)号：US08050085B2
公开(公告)日：2011-11-01
申请号：US10521553
申请日：2002-08-29
申请人： Masatoshi Takahashi , Takanori Yamazoe , Kozo Katayama , Toshihiro Tanaka , Yutaka Shinagawa , Hiroshi Watase , Takeo Kanai , Nobutaka Nagasaki
发明人： Masatoshi Takahashi , Takanori Yamazoe , Kozo Katayama , Toshihiro Tanaka , Yutaka Shinagawa , Hiroshi Watase , Takeo Kanai , Nobutaka Nagasaki
IPC分类号： G11C7/10 , G11C11/40
CPC分类号： G07F7/1008 , G06Q20/341 , G06Q20/40975 , G07F7/084 , G11C11/005 , G11C16/0425 , G11C16/0433 , G11C16/16
摘要： A semiconductor processing device according to the invention includes a first non-volatile memory (21) for erasing stored information on a first data length unit, a second non-volatile memory (22) for erasing stored information on a second data length unit, and a central processing unit (2), and capable of inputting/outputting encrypted data from/to an outside. The first non-volatile memory is used for storing an encryption key to be utilized for encrypting the data. The second non-volatile memory is used for storing a program to be processed by the central processing unit. The non-volatile memories to be utilized for storing the program and for storing the encryption key are separated from each other, and the data lengths of the erase units of information to be stored in the non-volatile memories are defined separately. Therefore, the stored information can efficiently be erased before the execution of a processing of writing the program, and the stored information can be erased corresponding to the data length of a necessary processing unit in the write of the encryption key to be utilized in the calculation processing of the CPU.
摘要翻译：根据本发明的半导体处理装置包括用于擦除第一数据长度单元上存储的信息的第一非易失性存储器（21），用于擦除第二数据长度单元上存储的信息的第二非易失性存储器（22），以及中央处理单元（2），能够从/向外部输入/输出加密数据。第一非易失性存储器用于存储要用于加密数据的加密密钥。第二非易失性存储器用于存储要由中央处理单元处理的程序。用于存储程序和用于存储加密密钥的非易失性存储器彼此分离，并且存储在非易失性存储器中的信息的擦除单元的数据长度被分开地定义。因此，在执行写入程序的处理之前可以有效地擦除存储的信息，并且可以根据在计算中要使用的加密密钥的写入中的必要处理单元的数据长度来擦除存储的信息处理CPU。

9. 发明申请

US20090213649A1 Semiconductor processing device and IC card 有权
标题翻译：半导体处理装置和IC卡
公开(公告)号：US20090213649A1
公开(公告)日：2009-08-27
申请号：US10521553
申请日：2002-08-29
申请人： Masatoshi Takahashi , Takanori Yamazoe , Kozo Katayama , Toshihiro Tanaka , Yutaka Shinagawa , Hiroshi Watase , Takeo Kanai , Nobutaka Nagasaki
发明人： Masatoshi Takahashi , Takanori Yamazoe , Kozo Katayama , Toshihiro Tanaka , Yutaka Shinagawa , Hiroshi Watase , Takeo Kanai , Nobutaka Nagasaki
IPC分类号： G11C11/34 , G11C16/04 , G11C5/14 , G06F12/14
CPC分类号： G07F7/1008 , G06Q20/341 , G06Q20/40975 , G07F7/084 , G11C11/005 , G11C16/0425 , G11C16/0433 , G11C16/16
摘要： A semiconductor processing device according to the invention includes a first non-volatile memory (21) for erasing stored information on a first data length unit, a second non-volatile memory (22) for erasing stored information on a second data length unit, and a central processing unit (2), and capable of inputting/outputting encrypted data from/to an outside. The first non-volatile memory is used for storing an encryption key to be utilized for encrypting the data. The second non-volatile memory is used for storing a program to be processed by the central processing unit. The non-volatile memories to be utilized for storing the program and for storing the encryption key are separated from each other, and the data lengths of the erase units of information to be stored in the non-volatile memories are defined separately. Therefore, the stored information can efficiently be erased before the execution of a processing of writing the program, and the stored information can be erased corresponding to the data length of a necessary processing unit in the write of the encryption key to be utilized in the calculation processing of the CPU.
摘要翻译：根据本发明的半导体处理装置包括用于擦除第一数据长度单元上存储的信息的第一非易失性存储器（21），用于擦除第二数据长度单元上存储的信息的第二非易失性存储器（22），以及中央处理单元（2），能够从/向外部输入/输出加密数据。第一非易失性存储器用于存储要用于加密数据的加密密钥。第二非易失性存储器用于存储要由中央处理单元处理的程序。用于存储程序和用于存储加密密钥的非易失性存储器彼此分离，并且存储在非易失性存储器中的信息的擦除单元的数据长度被分开地定义。因此，在执行写入程序的处理之前可以有效地擦除存储的信息，并且可以根据在计算中要使用的加密密钥的写入中的必要处理单元的数据长度来擦除存储的信息处理CPU。

10. 发明授权

US07009890B2 Non-volatile semiconductor memory array and method of reading the same memory array 失效
公开(公告)号：US07009890B2
公开(公告)日：2006-03-07
申请号：US10317087
申请日：2002-12-12
申请人： Takanori Yamazoe , Hiroshi Yoshigi , Takeo Kanai
发明人： Takanori Yamazoe , Hiroshi Yoshigi , Takeo Kanai
IPC分类号： G11C16/00
CPC分类号： G11C16/26 , G11C16/32
摘要： A non-volatile semiconductor memory EEPROM is usually deteriorated depending on the number of times of program and erase operations and application years thereof. A read operation rate of the EEPROM is generally specified to the operation rate considering deterioration of memory and even in the case where the number of times of program and erase operations is rather small and application years are also rather small, the read operation has been conducted at the read operation rate specified considering deterioration of memory. Moreover, when deterioration of memory is advanced exceeding the specified deterioration, the read operation is now disabled in the worst case. In order to overcome such problem, the reference memories are allocated for every erase and program unit block in the EEPROM memory array, the reference memories are also programmed and erased whenever the memories in the block are erased and programmed and the read timing of memory is generated from the read timing of these reference memories. Moreover, the read timing of the reference memories is outputted as an external interface.

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