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1. 发明授权

US06888488B2 A/D converter with reduced power consumption 失效
标题翻译： A / D转换器，功耗降低
公开(公告)号：US06888488B2
公开(公告)日：2005-05-03
申请号：US10304756
申请日：2002-11-27
申请人： Hiroshi Takakusagi , Toshitaka Mizuguchi , Chikara Tsuchiya , Katsuyosi Yamamoto
发明人： Hiroshi Takakusagi , Toshitaka Mizuguchi , Chikara Tsuchiya , Katsuyosi Yamamoto
IPC分类号： H03M1/36 , H03K5/08 , H03K5/24 , H03M1/00
CPC分类号： H03K5/249 , H03M1/002 , H03M1/36
摘要： An A/D converter includes a plurality of comparators, each of which samples an analog input potential during a first period, and compares the analog input potential with a reference potential during a second period, an encoder which encodes comparison results obtained by the comparators, and a control signal supply unit which generates one or more control signals that define the first period and the second period such as to make a duration of the first period different from a duration of the send period, and supplies the one or more control signals to the plurality of comparators.
摘要翻译： A / D转换器包括多个比较器，每个比较器在第一周期期间采样模拟输入电位，并且在第二周期期间将模拟输入电位与参考电位进行比较，编码器编码由比较器获得的比较结果，以及控制信号提供单元，其产生定义第一周期和第二周期的一个或多个控制信号，以使得第一周期的持续时间不同于发送周期的持续时间，并将一个或多个控制信号提供给多个比较器。

2. 发明授权

US07242427B2 X-Y address type solid-state image pickup device with an image averaging circuit disposed in the noise cancel circuit 有权
标题翻译：具有设置在噪声消除电路中的图像平均电路的X-Y地址型固态图像拾取装置
公开(公告)号：US07242427B2
公开(公告)日：2007-07-10
申请号：US10055901
申请日：2002-01-28
申请人： Masatoshi Kokubun , Katsuyosi Yamamoto , Shinya Udo , Jun Funakoshi , Chikara Tsuchiya
发明人： Masatoshi Kokubun , Katsuyosi Yamamoto , Shinya Udo , Jun Funakoshi , Chikara Tsuchiya
IPC分类号： H04N5/217
CPC分类号： H04N5/378 , H04N5/343 , H04N5/347
摘要： The invention relates to an X-Y address type solid-state image pickup device manufactured by a CMOS process, and has an object to provide an X-Y address type solid-state image pickup device in which a chip area is not increased, manufacturing costs are suppressed, and an image averaging processing can be carried out. Pixel regions Pmn are arranged in a matrix form in regions defined by horizontal selection lines RWm and vertical selection lines CLn. Each of the pixel regions Pmn includes a photodiode 10, a source follower amplifier 14 for converting an electric charge of the photodiode 10 into a voltage and amplifying it to output image data, and a horizontal selection transistor 16 for outputting the image data to a predetermined one of the vertical selection lines CLn. An amplifier/noise cancel circuit 6 has a built-in image averaging circuit for carrying out an averaging processing of the image data outputted from at least two of the plurality of the pixel regions Pmn.
摘要翻译：本发明涉及一种通过CMOS工艺制造的XY地址型固态摄像装置，其目的是提供一种XY地址型固态摄像装置，其中芯片面积不增加，制造成本被抑制，并且可以执行图像平均处理。像素区域Pmn以由水平选择线RWm和垂直选择线CLn限定的区域中的矩阵形式排列。每个像素区Pmn包括光电二极管10，用于将光电二极管10的电荷转换成电压并放大以输出图像数据的源极跟随器放大器14以及用于将图像数据输出到预定的水平选择晶体管16 垂直选择线CLn之一。放大器/噪声消除电路6具有内置图像平均电路，用于对从多个像素区域Pmn中的至少两个输出的图像数据进行平均处理。

3. 发明授权

US06914631B2 Image sensor 有权
标题翻译：图像传感器
公开(公告)号：US06914631B2
公开(公告)日：2005-07-05
申请号：US10042240
申请日：2002-01-11
申请人： Shinya Udo , Masatoshi Kokubun , Chikara Tsuchiya , Katsuyosi Yamamoto
发明人： Shinya Udo , Masatoshi Kokubun , Chikara Tsuchiya , Katsuyosi Yamamoto
IPC分类号： H01L27/146 , H01L31/10 , H04N5/335 , H04N5/365 , H04N5/369 , H04N5/374 , H04N5/378
CPC分类号： H04N5/363
摘要： The invention relates to an X-Y address type solid-state image pickup device manufactured by a CMOS process, and has an object to provide an X-Y address type solid-state image pickup device which has a small element size and a wide opening ratio, and can reduce a kTC noise. A photodiode 10, a reset transistor 12, a source follower amplifier 14, and a horizontal selection transistor 16 are formed in each of pixel regions Pmn. A kTC noise reduction circuit 6VR1 for reducing a kTC noise and a CDS circuit 6CL1 are formed outside of the pixel regions Pmn. A differential amplifier is constituted by a first differential transistor 62 of the kTC noise reduction circuit 6VR1 and the source follower amplifier 14 in each of the pixel regions Pmn.
摘要翻译：本发明涉及一种通过CMOS工艺制造的XY地址型固态摄像装置，其目的是提供一种具有小元件尺寸和宽开口率的XY地址型固态图像拾取装置，并且可以降低kTC噪声。在每个像素区域Pmn中形成光电二极管10，复位晶体管12，源极跟随放大器14和水平选择晶体管16。在像素区域Pmn的外部形成用于降低kTC噪声的kTC噪声降低电路6 VR 1和CDS电路6 CL 1。差分放大器由每个像素区域Pmn中的kTC降噪电路6 VR 1的第一差分晶体管62和源极跟随放大器14构成。

4. 发明授权

US07196726B2 CMOS sensor circuit having a voltage control circuit controlling a gate potential of a photodiode reset transistor to a potential other than power source potentials 失效
标题翻译： CMOS传感器电路具有将光电二极管复位晶体管的栅极电位控制为电源电位以外的电位的电压控制电路
公开(公告)号：US07196726B2
公开(公告)日：2007-03-27
申请号：US10058789
申请日：2002-01-30
申请人： Masatoshi Kokubun , Katsuyosi Yamamoto , Chikara Tsuchiya
发明人： Masatoshi Kokubun , Katsuyosi Yamamoto , Chikara Tsuchiya
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/3594 , H04N5/374
摘要： The CMOS sensor circuit comprises a photodiode, a reset transistor resetting the photodiode to an initial voltage, and a voltage control circuit controlling a gate potential of the reset transistor to a potential other than power source potentials. The voltage control circuit consists of an inverter circuit driving a gate of the reset transistor. The inverter circuit includes a P-channel MOS transistor, an N-channel MOS transistor, and a transistor inserted between a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor so as to control a blooming.
摘要翻译： CMOS传感器电路包括光电二极管，将光电二极管复位为初始电压的复位晶体管，以及将复位晶体管的栅极电位控制为电源电位以外的电位的电压控制电路。电压控制电路由驱动复位晶体管的栅极的逆变器电路构成。逆变器电路包括P沟道MOS晶体管，N沟道MOS晶体管和插入在P沟道MOS晶体管的漏极和N沟道MOS晶体管的漏极之间的晶体管，以便控制着色。

5. 发明授权

US08416015B2 Active rectifying apparatus 有权
标题翻译：主动整流装置
公开(公告)号：US08416015B2
公开(公告)日：2013-04-09
申请号：US13078386
申请日：2011-04-01
申请人： Chikara Tsuchiya
发明人： Chikara Tsuchiya
IPC分类号： H03K17/74 , H03G11/02
CPC分类号： H03K17/302 , H01L27/0817 , H01L27/088 , H03K2017/307
摘要： A semiconductor apparatus includes: a first transistor; a second transistor having a higher withstand voltage than the first transistor, a source of the second transistor coupled to a drain of the first transistor, a gate of the second transistor coupled to a source of the first transistor; a third transistor having a higher withstand voltage than the first transistor and a drain of the third transistor coupled to a drain of the second transistor; and a comparator that compares a source voltage of the first transistor with a source voltage of the third transistor, and controls a gate voltage of the first transistor.
摘要翻译：一种半导体装置，包括：第一晶体管; 第二晶体管具有比第一晶体管更高的耐受电压，第二晶体管的源极耦合到第一晶体管的漏极，第二晶体管的栅极耦合到第一晶体管的源极; 具有比第一晶体管更高的耐受电压的第三晶体管和耦合到第二晶体管的漏极的第三晶体管的漏极; 以及比较器，其将第一晶体管的源极电压与第三晶体管的源极电压进行比较，并且控制第一晶体管的栅极电压。

6. 发明授权

US07019501B2 DC/DC converter 有权
标题翻译： DC / DC转换器
公开(公告)号：US07019501B2
公开(公告)日：2006-03-28
申请号：US10806150
申请日：2004-03-23
申请人： Hirofumi Dogome , Takashi Matsumoto , Kyuichi Takimoto , Hidekiyo Ozawa , Chikara Tsuchiya
发明人： Hirofumi Dogome , Takashi Matsumoto , Kyuichi Takimoto , Hidekiyo Ozawa , Chikara Tsuchiya
IPC分类号： G05F1/40
CPC分类号： H02M3/158 , H02J7/0065 , H02M1/088
摘要： A DC/DC converter enabling an increase in frequency. The DC/DC converter includes a main transistor, a synchronization transistor, a control circuit, which controls the main transistor and the synchronization transistor, and a capacitor, which is charged to generate gate voltage for the main transistor. The control circuit includes a charging time setting circuit for setting the activation time of the main transistor and the synchronization transistor.
摘要翻译： DC / DC转换器，能够提高频率。 DC / DC转换器包括主晶体管，同步晶体管，控制主晶体管和同步晶体管的控制电路以及被充电以产生主晶体管的栅极电压的电容器。控制电路包括用于设定主晶体管和同步晶体管的激活时间的充电时间设定电路。

7. 发明申请

US20050030777A1 DC/DC converter 有权
标题翻译： DC / DC转换器
公开(公告)号：US20050030777A1
公开(公告)日：2005-02-10
申请号：US10806150
申请日：2004-03-23
申请人： Hirofumi Dogome , Takashi Matsumoto , Kyuichi Takimoto , Hidekiyo Ozawa , Chikara Tsuchiya
发明人： Hirofumi Dogome , Takashi Matsumoto , Kyuichi Takimoto , Hidekiyo Ozawa , Chikara Tsuchiya
IPC分类号： H02M3/155 , H02J7/00 , H02M1/088 , H02M3/158 , H02M7/00
CPC分类号： H02M3/158 , H02J7/0065 , H02M1/088
摘要： A DC/DC converter enabling an increase in frequency. The DC/DC converter includes a main transistor, a synchronization transistor, a control circuit, which controls the main transistor and the synchronization transistor, and a capacitor, which is charged to generate gate voltage for the main transistor. The control circuit includes a charging time setting circuit for setting the activation time of the main transistor and the synchronization transistor.
摘要翻译： DC / DC转换器，能够提高频率。 DC / DC转换器包括主晶体管，同步晶体管，控制主晶体管和同步晶体管的控制电路以及被充电以产生主晶体管的栅电压的电容器。控制电路包括用于设定主晶体管和同步晶体管的激活时间的充电时间设定电路。

8. 发明授权

US06448836B2 Operational amplifier and its offset cancel circuit 有权
标题翻译：运算放大器及其偏移消除电路
公开(公告)号：US06448836B2
公开(公告)日：2002-09-10
申请号：US09731710
申请日：2000-12-08
申请人： Masatoshi Kokubun , Shinya Udo , Seiji Yamagata , Chikara Tsuchiya
发明人： Masatoshi Kokubun , Shinya Udo , Seiji Yamagata , Chikara Tsuchiya
IPC分类号： H03L500
CPC分类号： H03F3/45753
摘要： An offset cancel circuit for an operational amplifier comprises a capacitive element for storing a voltage to be amplified by an operational amplifier section and containing an offset, and for feedback-controlling a voltage value of the operational amplifier section based on the stored voltage, and switching elements for switching operation between the storage of the voltage in the capacitive element and the feedback control based on the value of the voltage stored in the capacitive element. The capacitive element and the switching elements can be used to cancel accurately an offset in the operational amplifier section without increasing the gate areas of transistors in the operational amplifier section.
摘要翻译：用于运算放大器的偏移消除电路包括用于存储由运算放大器部分放大并且包含偏移的电压的电容元件，并且用于基于所存储的电压反馈控制运算放大器部分的电压值，以及切换用于基于存储在电容元件中的电压的值，在电容元件中的电压的存储和反馈控制之间切换操作的元件。可以使用电容元件和开关元件来精确地抵消运算放大器部分中的偏移，而不增加运算放大器部分中的晶体管的栅极面积。

9. 发明授权

US4362985A Integrated circuit for generating a reference voltage 失效
标题翻译：用于产生参考电压的集成电路
公开(公告)号：US4362985A
公开(公告)日：1982-12-07
申请号：US255038
申请日：1981-04-17
申请人： Chikara Tsuchiya
发明人： Chikara Tsuchiya
IPC分类号： H01L27/04 , G05F3/26 , G05F3/30 , H01L21/822 , G05F3/20
CPC分类号： G05F3/265 , Y10S323/907
摘要： A circuit for generating a reference voltage including a first transistor and a second transistor of which the bases being commonly connected together. The area of the emitter of the first transistor being smaller than the area of the emitter of the second transistor, the emitter of the first transistor being connected to the ground, and the emitter of the second transistor being connected to the ground via a first resistor. The circuit also includes a current supply means which supplies an equal current to the collectors of the first and second transistors and a second resistor which is connected between an output terminal and a connection point of the commonly connected bases of the first and second transistors. The circuit additionally includes a current generator circuit which is connected between the connection point of the commonly connected bases and the ground to produce a current which is proportional to the emitter current of the first transistor or the second transistor, such that a constant voltage is generated at the output terminal.
摘要翻译：一种用于产生包括第一晶体管和第二晶体管的参考电压的电路，其中所述基极共同连接在一起。第一晶体管的发射极的面积小于第二晶体管的发射极的面积，第一晶体管的发射极连接到地，第二晶体管的发射极通过第一电阻器连接到地。电路还包括电流供应装置，其向第一和第二晶体管的集电极提供相等的电流，以及连接在第一和第二晶体管的共同连接的基极的输出端子和连接点之间的第二电阻器。电路还包括电流发生器电路，其连接在共同连接的基座的连接点和地之间，以产生与第一晶体管或第二晶体管的发射极电流成比例的电流，使得产生恒定的电压在输出端。

10. 发明申请

US20070216381A1 Linear regulator circuit 审中-公开
标题翻译：线性稳压电路
公开(公告)号：US20070216381A1
公开(公告)日：2007-09-20
申请号：US11499718
申请日：2006-08-07
申请人： Chikara Tsuchiya , Eiji Nishimori
发明人： Chikara Tsuchiya , Eiji Nishimori
IPC分类号： G05F1/00
CPC分类号： G05F1/575
摘要： A linear regulator circuit for suppressing power supply noise that propagates to an output voltage. An LDO circuit functioning as the linear regulator circuit is provided with an output transistor including a source for receiving input voltage, a drain for outputting the output voltage, and a control terminal. An error amplifier powered by the input voltage generates a control voltage for controlling the output transistor based on a potential difference between a feedback voltage, which corresponds to the output voltage, and a reference voltage. A first capacitor and a resistor are connected in series between the source of the output transistor and an output terminal of the error amplifier.
摘要翻译：一种用于抑制传播到输出电压的电源噪声的线性调节器电路。用作线性调节器电路的LDO电路设置有包括用于接收输入电压的源极，用于输出输出电压的漏极和控制端子的输出晶体管。由输入电压供电的误差放大器基于对应于输出电压的反馈电压与参考电压之间的电位差产生用于控制输出晶体管的控制电压。第一电容器和电阻器串联连接在输出晶体管的源极和误差放大器的输出端子之间。

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