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    • 5. 发明授权
    • Address determination circuit and optical communication system
    • 地址确定电路和光通信系统
    • US07133613B2
    • 2006-11-07
    • US11282563
    • 2005-11-21
    • Hiroshi ShimizuMasayuki SuehiroDaisuke HayashiAkira Miura
    • Hiroshi ShimizuMasayuki SuehiroDaisuke HayashiAkira Miura
    • H04J14/00
    • H04Q11/0005H04Q11/0066H04Q2011/002H04Q2011/0039H04Q2011/0041
    • An address determination circuit makes an address determination of an optical packet to which a destination address and a source address are assigned on a bit-by-bit basis. The address determination circuit has an optical branching section which divides the optical packet into branches, in which each of the branched optical packet contains the same original data, a delay section which delays at least one of the branched optical packets, a bit determination section which determines each bit value of the branched optical packets, and a logic operation section which performs a logic operation on the bit values of the branched optical packets determined by the bit determination section. The delay section delays the branched optical packets so that the logic operation section performs the logic operation on a bit assigned the destination address or the source address and a bit having a predetermined bit value in synchronization with each other.
    • 地址确定电路对目标地址和源地址逐位分配的光分组进行地址确定。 地址确定电路具有光分路部分,其将光分组划分成分支,其中每个分支光分组包含相同的原始数据;延迟部分,其延迟至少一个分支光分组;比特确定部分, 确定分支光学分组的每个比特值;以及逻辑运算部分,对由比特确定部分确定的分支光学分组的比特值进行逻辑运算。 延迟部延迟分支的光分组,使得逻辑运算部分对分配了目的地址或源地址的位执行逻辑运算,并且具有彼此同步的具有预定位值的位。