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1. 发明授权

US09298419B2 Merging sorted data arrays based on vector minimum, maximum, and permute instructions 有权
标题翻译：根据向量最小值，最大值和置换指令合并排序的数据数组
公开(公告)号：US09298419B2
公开(公告)日：2016-03-29
申请号：US13601177
申请日：2012-08-31
申请人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
IPC分类号： G06F7/36 , G06F9/30 , G06F9/38
CPC分类号： G06F7/36 , G06F9/3001 , G06F9/30021 , G06F9/30032 , G06F9/30036 , G06F9/3885 , G06F9/3887
摘要： A method and apparatus are provided to perform efficient merging operations of two or more streams of data by using SIMD instruction. Streams of data are merged together in parallel and with mitigated or removed conditional branching. The merge operations of the streams of data include Merge AND and Merge OR operations.
摘要翻译：提供了一种通过使用SIMD指令来执行两个或更多个数据流的有效合并操作的方法和装置。数据流并行并入缓冲或移除条件分支。数据流的合并操作包括合并和和合并或运算。

2. 发明授权

US08271994B2 Reduced data transfer during processor context switching 失效
公开(公告)号：US08271994B2
公开(公告)日：2012-09-18
申请号：US11353288
申请日：2006-02-11
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.

3. 发明授权

US07864081B2 Fast implementation of decoding function for variable length encoding 有权
标题翻译：快速实现可变长度编码的解码功能
公开(公告)号：US07864081B2
公开(公告)日：2011-01-04
申请号：US12135257
申请日：2008-06-09
申请人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
发明人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
IPC分类号： H03M7/00
CPC分类号： H03M7/40
摘要： An embodiment of the present inventions is a method for encoding/decoding data of variable length format and is used to omit unnecessary pieces of data for the purpose of improving processing performance, reducing the size of data on communication paths and efficiently using limited physical memory. As examples of such variable length encoding, BER compression and UTF-8 encoding of UNICODE text, etc., are cited. While the amount of data can be reduced through encoding, before the data is actually used, it is necessary to restore (decode) it to the original data, which requires a great deal of processing time. One aspect of the present invention is improving decoding by reducing the processing time required to decode the encoded data.
摘要翻译：本发明的实施例是用于对可变长度格式的数据进行编码/解码的方法，并且用于省略不必要的数据片段以便改善处理性能，减少通信路径上的数据的大小并有效地使用有限的物理存储器。作为这种可变长度编码的例子，引用了BER压缩和UNICODE文本的UTF-8编码等。虽然可以通过编码减少数据量，但在实际使用数据之前，需要将其还原（解码）为原始数据，这需要大量的处理时间。本发明的一个方面是通过减少解码编码数据所需的处理时间来改进解码。

4. 发明申请

US20080270772A1 Reduced data transfer during processor context switching 失效
标题翻译：在处理器上下文切换期间减少数据传输
公开(公告)号：US20080270772A1
公开(公告)日：2008-10-30
申请号：US12172253
申请日：2008-07-13
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/312
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.
摘要翻译：处理器上下文切换期间的数据传输减少，特别是在分时微任务编程模型方面。在将具有本地存储器的处理器从第一处理切换到第二处理之前，确定不需要传送到系统存储器以适当地保存与第一处理相关联的数据的本地存储器的一部分。然后，处理器的上下文从第一处理切换到第二处理，包括将与第一处理相关联的所有本地存储器传送到系统存储器 - 除了被确定为不是的本地存储器的部分之外需要保存到系统存储器以适当地保存与第一进程相关联的数据。因此，将上下文从第一处理切换到第二处理导致从本地存储器传送到系统存储器的数据的减少。

5. 发明申请

US20130042092A1 MERGE OPERATIONS OF DATA ARRAYS BASED ON SIMD INSTRUCTIONS 有权
标题翻译：基于SIMD指令的数据阵列的合并运算
公开(公告)号：US20130042092A1
公开(公告)日：2013-02-14
申请号：US13601177
申请日：2012-08-31
申请人： Hiroshi INOUE , Moriyoshi Ohara , Hideaki Komatsu
发明人： Hiroshi INOUE , Moriyoshi Ohara , Hideaki Komatsu
IPC分类号： G06F9/302
CPC分类号： G06F7/36 , G06F9/3001 , G06F9/30021 , G06F9/30032 , G06F9/30036 , G06F9/3885 , G06F9/3887
摘要： A method and apparatus are provided to perform efficient merging operations of two or more streams of data by using SIMD instruction. Streams of data are merged together in parallel and with mitigated or removed conditional branching. The merge operations of the streams of data include Merge AND and Merge OR operations.
摘要翻译：提供了一种通过使用SIMD指令来执行两个或更多个数据流的有效合并操作的方法和装置。数据流并行并入缓冲或移除条件分支。数据流的合并操作包括合并和和合并或运算。

6. 发明授权

US07536532B2 Merge operations of data arrays based on SIMD instructions 有权
标题翻译：基于SIMD指令合并数据阵列的操作
公开(公告)号：US07536532B2
公开(公告)日：2009-05-19
申请号：US11535840
申请日：2006-09-27
申请人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
IPC分类号： G06F15/80
CPC分类号： G06F7/36 , G06F9/3001 , G06F9/30021 , G06F9/30032 , G06F9/30036 , G06F9/3885 , G06F9/3887
摘要： A method and apparatus are provided to perform efficient merging operations of two or more streams of data by using SIMD instruction. Streams of data are merged together in parallel and with mitigated or removed conditional branching. The merge operations of the streams of data include Merge AND and Merge OR operations.
摘要翻译：提供了一种通过使用SIMD指令来执行两个或更多个数据流的有效合并操作的方法和装置。数据流并行并入缓冲或移除条件分支。数据流的合并操作包括合并和和合并或运算。

7. 发明申请

US20080238734A1 Fast Implementation Of Decoding Function For Variable Length Encoding 审中-公开
标题翻译：快速实现可变长度编码的解码功能
公开(公告)号：US20080238734A1
公开(公告)日：2008-10-02
申请号：US12135233
申请日：2008-06-09
申请人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
发明人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
IPC分类号： H03M7/40
CPC分类号： H03M7/40
摘要： An embodiment of the present inventions is a method for encoding/decoding data of variable length format and is used to omit unnecessary pieces of data for the purpose of improving processing performance, reducing the size of data on communication paths and efficiently using limited physical memory. As examples of such variable length encoding, BER compression and UTF-8 encoding of UNICODE text, etc., are cited. While the amount of data can be reduced through encoding, before the data is actually used, it is necessary to restore (decode) it to the original data, which requires a great deal of processing time. One aspect of the present invention is improving decoding by reducing the processing time required to decode the encoded data.
摘要翻译：本发明的实施例是用于对可变长度格式的数据进行编码/解码的方法，并且用于省略不必要的数据片段以便改善处理性能，减少通信路径上的数据的大小并有效地使用有限的物理存储器。作为这种可变长度编码的例子，引用了BER压缩和UNICODE文本的UTF-8编码等。虽然可以通过编码减少数据量，但在实际使用数据之前，需要将其还原（解码）为原始数据，这需要大量的处理时间。本发明的一个方面是通过减少解码编码数据所需的处理时间来改进解码。

8. 发明申请

US20080165038A1 FAST IMPLEMENTATION OF DECODING FUNCTION FOR VARIABLE LENGTH ENCODING 有权
标题翻译：用于可变长度编码的解码函数的快速实现
公开(公告)号：US20080165038A1
公开(公告)日：2008-07-10
申请号：US11621285
申请日：2007-01-09
申请人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
发明人： Hiroshi Inoue , Hideaki Komatsu , Moriyoshi Ohara
IPC分类号： H03M7/40
CPC分类号： H03M7/40
摘要： An embodiment of the present inventions is a method for encoding/decoding data of variable length format and is used to omit unnecessary pieces of data for the purpose of improving processing performance, reducing the size of data on communication paths and efficiently using limited physical memory. As examples of such variable length encoding, BER compression and UTF-8 encoding of UNICODE text, etc., are cited. While the amount of data can be reduced through encoding, before the data is actually used, it is necessary to restore (decode) it to the original data, which requires a great deal of processing time. One aspect of the present invention is improving decoding by reducing the processing time required to decode the encoded data.
摘要翻译：本发明的实施例是用于对可变长度格式的数据进行编码/解码的方法，并且用于省略不必要的数据片段以便改善处理性能，减少通信路径上的数据的大小并有效地使用有限的物理存储器。作为这种可变长度编码的例子，引用了BER压缩和UNICODE文本的UTF-8编码等。虽然可以通过编码减少数据量，但在实际使用数据之前，需要将其还原（解码）为原始数据，这需要大量的处理时间。本发明的一个方面是通过减少解码编码数据所需的处理时间来改进解码。

9. 发明申请

US20080077768A1 Merge Operations Based on SIMD Instructions 有权
标题翻译：基于SIMD指令的合并操作
公开(公告)号：US20080077768A1
公开(公告)日：2008-03-27
申请号：US11535840
申请日：2006-09-27
申请人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Hideaki Komatsu
IPC分类号： G06F15/00
CPC分类号： G06F7/36 , G06F9/3001 , G06F9/30021 , G06F9/30032 , G06F9/30036 , G06F9/3885 , G06F9/3887
摘要： A method and apparatus are provided to perform efficient merging operations of two or more streams of data by using SIMD instruction. Streams of data are merged together in parallel and with mitigated or removed conditional branching. The merge operations of the streams of data include Merge AND and Merge OR operations.
摘要翻译：提供了一种通过使用SIMD指令来执行两个或更多个数据流的有效合并操作的方法和装置。数据流并行并入缓冲或移除条件分支。数据流的合并操作包括合并和和合并或运算。

10. 发明申请

US20070192767A1 Reduced data transfer during processor context switching 失效
标题翻译：在处理器上下文切换期间减少数据传输
公开(公告)号：US20070192767A1
公开(公告)日：2007-08-16
申请号：US11353288
申请日：2006-02-11
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.
摘要翻译：处理器上下文切换期间的数据传输减少，特别是在分时微任务编程模型方面。在将具有本地存储器的处理器从第一处理切换到第二处理之前，确定不需要传送到系统存储器以适当地保存与第一处理相关联的数据的本地存储器的一部分。然后，处理器的上下文从第一处理切换到第二处理，包括将与第一处理相关联的所有本地存储器传送到系统存储器 - 除了被确定为不是的本地存储器的部分之外需要保存到系统存储器以适当地保存与第一进程相关联的数据。因此，将上下文从第一处理切换到第二处理导致从本地存储器传送到系统存储器的数据的减少。

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