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1. 发明授权

US08204105B2 Transcoder and coded image conversion method 有权
标题翻译：转码器和编码图像转换方法
公开(公告)号：US08204105B2
公开(公告)日：2012-06-19
申请号：US11774427
申请日：2007-07-06
申请人： Hiromu Hasegawa , Nobuyuki Takasu , Mayumi Okumura , Akira Okamoto , Takashi Matsumoto , Norihiko Nagai
发明人： Hiromu Hasegawa , Nobuyuki Takasu , Mayumi Okumura , Akira Okamoto , Takashi Matsumoto , Norihiko Nagai
IPC分类号： H04B1/66 , H04N7/12
CPC分类号： H04N19/124 , H04N19/137 , H04N19/14 , H04N19/176 , H04N19/40 , H04N19/61
摘要： A quantization step determination part inputs an evaluation value (ACT_MB) indicating the dispersion in a macroblock and its average value (ACT_PIC). A subtracter obtains the difference between these values, and a multiplier multiplies the difference by raq ( 1) to obtain a converted quantization step value (Qstep_AVC). This optimizes a bit allocation in accordance with an Activity value of the macroblock, to thereby improve the quality of image.
摘要翻译：量化步长决定部输入指示宏块中的色散的评价值（ACT_MB）及其平均值（ACT_PIC）。减法器获得这些值之间的差值，并且乘法器将差值乘以raq（<1）以获得加权值。接下来，加法器将加权值与源数据的平均量化步长值相加，最后，乘法器将和乘以阶跃值调整因子α（> 1），以获得转换的量化步长值（Qstep_AVC）。这优化了根据宏块的Activity值的位分配，从而提高图像的质量。

2. 发明申请

US20080031337A1 TRANSCODER AND CODED IMAGE CONVERSION METHOD 有权
标题翻译： TRANSCODER和编码图像转换方法
公开(公告)号：US20080031337A1
公开(公告)日：2008-02-07
申请号：US11774427
申请日：2007-07-06
申请人： Hiromu HASEGAWA , Nobuyuki Takasu , Mayumi Okumura , Akira Okamoto , Takashi Matsumoto , Norihiko Nagai
发明人： Hiromu HASEGAWA , Nobuyuki Takasu , Mayumi Okumura , Akira Okamoto , Takashi Matsumoto , Norihiko Nagai
IPC分类号： H04B1/66
CPC分类号： H04N19/124 , H04N19/137 , H04N19/14 , H04N19/176 , H04N19/40 , H04N19/61
摘要： A quantization step determination part inputs an evaluation value (ACT_MB) indicating the dispersion in a macroblock and its average value (ACT_PIC). A subtracter obtains the difference between these values, and a multiplier multiplies the difference by raq ( 1) to obtain a converted quantization step value (Qstep_AVC). This optimizes a bit allocation in accordance with an Activity value of the macroblock, to thereby improve the quality of image.
摘要翻译：量化步长决定部输入指示宏块中的色散的评价值（ACT_MB）及其平均值（ACT_PIC）。减法器获得这些值之间的差值，并且乘法器将差值乘以rαa（1）来获得加权值。接下来，加法器将加权值与源数据的平均量化步长值相加，最后，乘法器将和乘以阶跃值调整因子α（> 1），以获得转换的量化步长值（Qstep_AVC）。这优化了根据宏块的Activity值的位分配，从而提高图像的质量。

3. 发明授权

US09286018B2 Image processing device for improved access efficiency 有权
标题翻译：图像处理设备，提高了访问效率
公开(公告)号：US09286018B2
公开(公告)日：2016-03-15
申请号：US13704303
申请日：2011-06-07
申请人： Yasuhiro Yamada , Norihiko Nagai
发明人： Yasuhiro Yamada , Norihiko Nagai
IPC分类号： G06F3/12 , G06T3/40 , G06T1/60
CPC分类号： G06F3/1296 , G06T1/60 , G06T3/4038
摘要： An image processing device carries out processing in a processing unit of 3-blocks. Data of 192(=64×3)-pixels is required in the processing of 3-blocks. This is an amount of data corresponding to 16-cells. When 3-blocks and 16-cells are arranged along an scanning direction of an image, both ends of them in the scanning direction are aligned.
摘要翻译：图像处理装置在3个块的处理单元中进行处理。在三个块的处理中需要192（= 64×3）像素的数据。这是对应于16个单元格的数据量。当沿着图像的扫描方向布置3个块和16个单元时，它们沿扫描方向的两端对齐。

4. 发明授权

US09430992B2 Memory access device 有权
标题翻译：内存访问设备
公开(公告)号：US09430992B2
公开(公告)日：2016-08-30
申请号：US13992996
申请日：2011-03-10
申请人： Yasuhiro Yamada , Norihiko Nagai
发明人： Yasuhiro Yamada , Norihiko Nagai
IPC分类号： H04N19/46 , H04N19/423 , G09G5/39 , G09G5/393 , H04N19/523 , G06F13/32 , G06F13/28 , G06F12/08 , G06T1/60 , G06F13/16
CPC分类号： G09G5/393 , G06F13/16 , G06F13/28 , G06T1/60 , H04N19/423 , H04N19/46 , H04N19/523
摘要： A first look-up table (10) outputs a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A second look-up table (12) outputs a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. A third look-up table (14) outputs a residue as a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A fourth look-up table (16) outputs a residue as a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. The output values of the first and second look-up tables (10,12) are addresses of the cell for burst access to the memory. The output values of the third and fourth look-up tables (14,16) are used as pixel addresses in the cell.
摘要翻译：第一查找表（10）输出将该像素地址的水平分量除以该单元的水平分量中的像素数的结果。第二查找表（12）输出将该像素地址的垂直分量除以该单元的垂直分量中的像素数的结果。第三查找表（14）作为通过将单元中的像素地址的水平分量除以单元的水平分量中的像素数来输出残差。第四查找表（16）输出残差，作为将单元中的像素地址的垂直分量除以单元的垂直分量中的像素数目的结果。第一和第二查找表（10,12）的输出值是用于突发存取存储器的单元的地址。第三和第四查找表（14,16）的输出值被用作单元中的像素地址。

5. 发明申请

US20080184708A1 Gas Turbine Combustor 有权
标题翻译：燃气轮机燃烧器
公开(公告)号：US20080184708A1
公开(公告)日：2008-08-07
申请号：US11574203
申请日：2005-09-01
申请人： Atsushi Moriwaki , Masataka Ohta , Keijiro Saitoh , Satoshi Tanimura , Shinji Akamatsu , Norihiko Nagai
发明人： Atsushi Moriwaki , Masataka Ohta , Keijiro Saitoh , Satoshi Tanimura , Shinji Akamatsu , Norihiko Nagai
IPC分类号： F02C1/00
CPC分类号： F23R3/286 , F23R3/12 , F23R3/343 , Y02T50/675
摘要： A gas turbine combustor includes a pilot burner, a plurality of main burners disposed around the main burners on the radially outer side. Each of the main burners (2) includes an extension tube disposed at the downstream end. The outlet of the extension tube is shaped to have a radial edge which is parallel to the radial direction. In this manner, occurrence of flashback is effectively prevented.
摘要翻译：燃气轮机燃烧器包括引燃燃烧器，在径向外侧设置在主燃烧器周围的多个主燃烧器。每个主燃烧器（2）包括设置在下游端的延伸管。延伸管的出口成形为具有平行于径向方向的径向边缘。以这种方式，有效地防止闪回的发生。

6. 发明授权

US08072359B2 Binary arithmetic coding device 有权
标题翻译：二进制算术编码装置
公开(公告)号：US08072359B2
公开(公告)日：2011-12-06
申请号：US12674218
申请日：2008-08-20
申请人： Shigeru Kasuya , Norihiko Nagai
发明人： Shigeru Kasuya , Norihiko Nagai
IPC分类号： H03M7/00
CPC分类号： H03M7/4006 , H04N19/91
摘要： An object of the present invention is to provide a binary arithmetic coding device that allows real-time processing with a higher image quality. At a timing at which a ternary data string for a target bit is outputted, an updated coding range width and an updated range width of less probability are outputted. For that reason, while a binary conversion unit (32) and an f value retention processor (33) convert the ternary data string into a binary data string to output a coded bit, a binary arithmetic re-normalization unit (31) is allowed to perform a processing of binary arithmetic coding for the next bit.
摘要翻译：本发明的一个目的是提供一种允许具有更高图像质量的实时处理的二进制算术编码装置。在输出用于目标位的三进制数据串的定时，输出更新的编码范围宽度和较小概率的更新范围宽度。因此，当二进制转换单元（32）和f值保持处理器（33）将三进制数据串转换为二进制数据串以输出编码比特时，允许二进制算术重新归一化单元（31）对下一位进行二进制算术编码处理。

7. 发明申请

US20140139536A1 MEMORY ACCESS DEVICE 有权
标题翻译：存储器访问设备
公开(公告)号：US20140139536A1
公开(公告)日：2014-05-22
申请号：US13992996
申请日：2011-03-10
申请人： Yasuhiro Yamada , Norihiko Nagai
发明人： Yasuhiro Yamada , Norihiko Nagai
IPC分类号： G09G5/393
CPC分类号： G09G5/393 , G06F13/16 , G06F13/28 , G06T1/60 , H04N19/423 , H04N19/46 , H04N19/523
摘要： A first look-up table (10) outputs a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A second look-up table (12) outputs a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. A third look-up table (14) outputs a residue as a result of dividing a horizontal component of a pixel address in the block by number of pixels in a horizontal component of the cell. A fourth look-up table (16) outputs a residue as a result of dividing a vertical component of a pixel address in the block by number of pixels in a vertical component of the cell. The output values of the first and second look-up tables (10,12) are addresses of the cell for burst access to the memory. The output values of the third and fourth look-up tables (14,16) are used as pixel addresses in the cell.
摘要翻译：第一查找表（10）输出将该像素地址的水平分量除以该单元的水平分量中的像素数的结果。第二查找表（12）输出将该像素地址的垂直分量除以该单元的垂直分量中的像素数的结果。第三查找表（14）作为通过将单元中的像素地址的水平分量除以单元的水平分量中的像素数来输出残差。第四查找表（16）输出残差，作为将单元中的像素地址的垂直分量除以单元的垂直分量中的像素数目的结果。第一和第二查找表（10,12）的输出值是用于突发存取存储器的单元的地址。第三和第四查找表（14,16）的输出值被用作单元中的像素地址。

8. 发明申请

US20130088756A1 Image Processing Device 有权
标题翻译：图像处理装置
公开(公告)号：US20130088756A1
公开(公告)日：2013-04-11
申请号：US13704303
申请日：2011-06-07
申请人： Yasuhiro Yamada , Norihiko Nagai
发明人： Yasuhiro Yamada , Norihiko Nagai
IPC分类号： G06F3/12
CPC分类号： G06F3/1296 , G06T1/60 , G06T3/4038
摘要： An image processing device carries out processing in a processing unit of 3-blocks. Data of 192(=64×3)-pixels is required in the processing of 3-blocks. This is an amount of data corresponding to 16-cells. When 3-blocks and 16-cells are arranged along an scanning direction of an image, both ends of them in the scanning direction are aligned.
摘要翻译：图像处理装置在3个块的处理单元中进行处理。在三个块的处理中需要192（= 64×3）像素的数据。这是对应于16个单元格的数据量。当沿着图像的扫描方向布置3个块和16个单元时，它们沿扫描方向的两端对齐。

9. 发明授权

US08408002B2 Gas turbine combustor 有权
标题翻译：燃气轮机燃烧器
公开(公告)号：US08408002B2
公开(公告)日：2013-04-02
申请号：US11574203
申请日：2005-09-01
申请人： Atsushi Moriwaki , Masataka Ohta , Keijiro Saitoh , Satoshi Tanimura , Shinji Akamatsu , Norihiko Nagai
发明人： Atsushi Moriwaki , Masataka Ohta , Keijiro Saitoh , Satoshi Tanimura , Shinji Akamatsu , Norihiko Nagai
IPC分类号： F02C1/00
CPC分类号： F23R3/286 , F23R3/12 , F23R3/343 , Y02T50/675
摘要： A gas turbine combustor includes a pilot burner, a plurality of main burners disposed around the main burners on the radially outer side. Each of the main burners (2) includes an extension tube disposed at the downstream end. The outlet of the extension tube is shaped to have a radial edge which is parallel to the radial direction. In this manner, occurrence of flashback is effectively prevented.
摘要翻译：燃气轮机燃烧器包括引燃燃烧器，在径向外侧设置在主燃烧器周围的多个主燃烧器。每个主燃烧器（2）包括设置在下游端的延伸管。延伸管的出口成形为具有平行于径向方向的径向边缘。以这种方式，有效地防止闪回的发生。

10. 发明申请

US20110122964A1 Binary Arithmetic Coding Device 有权
标题翻译：二进制算术编码装置
公开(公告)号：US20110122964A1
公开(公告)日：2011-05-26
申请号：US12674218
申请日：2008-08-20
申请人： Shigeru Kasuya , Norihiko Nagai
发明人： Shigeru Kasuya , Norihiko Nagai
IPC分类号： H04L27/00
CPC分类号： H03M7/4006 , H04N19/91
摘要： An object of the present invention is to provide a binary arithmetic coding device that allows real-time processing with a higher image quality. At a timing at which a ternary data string for a target bit is outputted, an updated coding range width and an updated range width of less probability are outputted. For that reason, while a binary conversion unit (32) and an f value retention processor (33) convert the ternary data string into a binary data string to output a coded bit, a binary arithmetic re-normalization unit (31) is allowed to perform a processing of binary arithmetic coding for the next bit.
摘要翻译：本发明的一个目的是提供一种允许具有更高图像质量的实时处理的二进制算术编码装置。在输出用于目标位的三进制数据串的定时，输出更新的编码范围宽度和较小概率的更新范围宽度。因此，当二进制转换单元（32）和f值保持处理器（33）将三进制数据串转换为二进制数据串以输出编码比特时，允许二进制算术重新归一化单元（31）对下一位进行二进制算术编码处理。

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