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1. 发明授权

US5192996A Video chroma signal processing circuit 失效
标题翻译：视频色度信号处理电路
公开(公告)号：US5192996A
公开(公告)日：1993-03-09
申请号：US788240
申请日：1991-11-05
申请人： Hirohiko Sakashita , Tetsuo Kutsuki , Naoji Okumura
发明人： Hirohiko Sakashita , Tetsuo Kutsuki , Naoji Okumura
IPC分类号： H04N5/14 , H04N9/68 , H04N9/77 , H04N11/04
CPC分类号： H04N9/77
摘要： A video chroma signal processing circuit in which a composite video signal, formed of an analog luminance signal and an analog chrominance signal, is separated into Y and C components and converted into digital codes by AD converters and processed by processing circuits. The outputs of the processing circuits are converted into analog signals again with DA converters to produce a picture image; wherein, it is intended to obtain a wide band of a luminance signal by making efficient use of an AD converter for a chrominance signal and to improve horizontal resolution. The apparent sampling frequency is doubled by sampling the AD converter for a chrominance signal with a phase reverse to that of an AD converter for a luminance signal so as to improve the horizontal resolution of the luminance signal.
摘要翻译：一种视频色度信号处理电路，其中由模拟亮度信号和模拟色度信号形成的复合视频信号被分离成Y和C分量，并由AD转换器转换成数字码并由处理电路进行处理。处理电路的输出再次用DA转换器转换为模拟信号以产生图像; 其目的在于通过有效地利用AD转换器获得色度信号的宽带，提高水平分辨率。通过对与用于亮度信号的AD转换器的相位相反的色度信号的AD转换器采样AD视频采样频率，以提高亮度信号的水平分辨率。

2. 发明授权

US4835492A Voltage controlled oscillator having constant tuning bias voltage 失效
标题翻译：压控振荡器具有恒定的调谐偏置电压
公开(公告)号：US4835492A
公开(公告)日：1989-05-30
申请号：US163814
申请日：1988-02-11
申请人： Hideyuki Ikuhara , Akira Usui , Kazuhiko Kubo , Hiroyuki Nagai , Tetsuo Kutsuki
发明人： Hideyuki Ikuhara , Akira Usui , Kazuhiko Kubo , Hiroyuki Nagai , Tetsuo Kutsuki
IPC分类号： H03B1/00 , H03B5/18 , H03D7/00 , H03J7/02 , H03J7/08
CPC分类号： H03B5/1805 , H03J7/08 , H03B2201/0208 , H03D7/00
摘要： Disclosed is a local oscillator using a dielectric coaxial resonator (27), which is availably used as a fixed local oscillator in double-spot tuners and CATV converters, and which is arranged so that an AFC voltage is applied to a variable-capacitance diode (23) from an output terminal (E) of a frequency control circuit through a first resistor (35), the variable-capacitance diode having its one end being connected to a center conductor of a dielectric coaxial resonator (27) through a capacitor (25) and its other end being AC grounded, and that a first reference potential (V.sub.A) lower than a source voltage (V.sub.CC) by a predetermined value is given to the variable-capacitance diode (23), the one end of the variable-capacitance diode (23) being connected to the source voltage (V.sub.CC) through a second resistor (22), whereby the voltage impressed across the variable-capacitance diode (23) can be kept constant regardless of a variation in the source voltage to thereby prevent the oscillation frequency from fluctuating.
摘要翻译：公开了一种使用电介质同轴谐振器（27）的本地振荡器，其可用作双点调谐器和CATV转换器中的固定本地振荡器，并且被布置成使得AFC电压被施加到可变电容二极管 23）通过第一电阻器（35）从频率控制电路的输出端子（E）输出，其一端通过电容器（25）连接到电介质同轴谐振器（27）的中心导体）并且其另一端被交流接地，并且将低于源电压（VCC）的预定值的第一参考电位（VA）提供给可变电容二极管（23），可变电容的一端二极管（23）通过第二电阻（22）连接到源电压（VCC），由此不管源极电压的变化如何，跨越可变电容二极管（23）的电压保持恒定，从而防止振荡频率通货膨胀波动。

3. 发明授权

US4984081A Apparatus for receiving and selecting high-definition television (HDTV) signals and standard television (NTSC) signals 失效
标题翻译：用于接收和选择高分辨率电视（HDTV）信号和标准电视（NTSC）信号的装置
公开(公告)号：US4984081A
公开(公告)日：1991-01-08
申请号：US301034
申请日：1989-01-24
申请人： Toshihiro Miyoshi , Masahiro Kawashima , Hideyuki Ikuhara , Tetsuo Kutsuki , Kazuyasu Yamamoto
发明人： Toshihiro Miyoshi , Masahiro Kawashima , Hideyuki Ikuhara , Tetsuo Kutsuki , Kazuyasu Yamamoto
IPC分类号： H04N5/44
CPC分类号： H04N7/0122
摘要： An apparatus for receiving and selecting high-definition television signals and NTSC standard television signals includes a high-definition display screen device having an aspect ratio of 16 to 9. The NTSC standard television signals have an aspect ratio which is different than the 16 to 9 aspect ratio of the high-definition display screen device. A first signal converter is for converting the NTSC standard television signals into first quasi-high-definition television signals identifying a first displayed image corresponding in vertical length to a vertical length of the high-definition display screen device. A second signal converter is for converting the NTSC standard television signals into second quasi-high-definition television signals identifying a second displayed image corresponding in horizontal length to a horizontal length of the high-definition display screen device. Switching circuits are provided for selecting one of the high-definition television signals and the first and second quasi-high-definition television signals.
摘要翻译：一种用于接收和选择高分辨率电视信号和NTSC标准电视信号的装置包括具有16至9的宽高比的高分辨率显示屏幕设备.NTSC标准电视信号的宽高比不同于16到9 高清显示屏设备的宽高比。第一信号转换器用于将NTSC标准电视信号转换为第一准高清晰度电视信号，其将垂直长度对应的第一显示图像识别为高清晰度显示屏设备的垂直长度。第二信号转换器用于将NTSC标准电视信号转换成识别与水平长度对应的第二显示图像与高分辨率显示屏设备的水平长度的第二准高清晰度电视信号。提供开关电路用于选择高分辨率电视信号和第一和第二准高清晰度电视信号之一。

4. 发明授权

US4958228A Automatic frequency change device 失效
标题翻译：自动变频装置
公开(公告)号：US4958228A
公开(公告)日：1990-09-18
申请号：US303345
申请日：1989-01-30
申请人： Tetsuo Kutsuki
发明人： Tetsuo Kutsuki
IPC分类号： H04N7/01 , H03L7/095 , H03L7/099 , H03L7/18 , H04N5/12 , H04N5/46
CPC分类号： H04N5/126 , H03L7/099 , H03L7/095 , H04N5/46
摘要： An analog-to-digital converter converts an input analog video signal into a corresponding digital video signal. A first input terminal of a phase comparator receives the digital video signal. A loop filter receives an output signal from the phase comparator. A digital-to-analog converter converts an output signal from the loop filter into a corresponding analog control signal. First and second voltage-controlled oscillators generate oscillation output signals having different frequencies respectively which depend on the analog control signal. A switch selects and outputs either of the oscillation output signals. A frequency divider divides a frequency of the selected oscillation output signal into a value corresponding to a horizontal frequency. The frequency divider supplies its output signal to a second input terminal of the phase comparator. A change circuit detects whether or not the output signal from the frequency divider remains out of synchronism with the digital video signal for a time equal to or longer than a reference time, and controls the switch to change the selected oscillation output signal from one to the other when the output signal from the frequency divider remains out of synchronism with the digital video signal for a time equal to or longer than a reference time.
摘要翻译：模数转换器将输入的模拟视频信号转换成相应的数字视频信号。相位比较器的第一输入端接收数字视频信号。环路滤波器接收来自相位比较器的输出信号。数模转换器将来自环路滤波器的输出信号转换成相应的模拟控制信号。第一和第二压控振荡器分别产生取决于模拟控制信号的具有不同频率的振荡输出信号。开关选择并输出振荡输出信号。分频器将所选择的振荡输出信号的频率分成与水平频率对应的值。分频器将其输出信号提供给相位比较器的第二个输入端。改变电路检测来自分频器的输出信号是否与数字视频信号不同于等于或大于参考时间的时间，并且控制开关将选择的振荡输出信号从一个改变为另一方面，当来自分频器的输出信号与数字视频信号保持不同于等于或大于参考时间的时间时。

5. 发明授权

US4524389A Synchronous video detector circuit using phase-locked loop 失效
标题翻译：同步视频检测电路采用锁相环
公开(公告)号：US4524389A
公开(公告)日：1985-06-18
申请号：US438466
申请日：1982-11-02
申请人： Mitsuo Isobe , Tetsuo Kutsuki , Namio Yamaguchi , Toshihide Tanaka
发明人： Mitsuo Isobe , Tetsuo Kutsuki , Namio Yamaguchi , Toshihide Tanaka
IPC分类号： H03B5/12 , H04N5/21 , H04N5/455 , H04N5/44 , H04B1/68
CPC分类号： H04N5/455 , H03B5/1209 , H03B5/1231 , H04N5/21
摘要： In a synchronous video detector circuit using a phase-locked loop, the synchronous detection of a video IF signal is effected with a synchronous carrier signal reproduced by the PLL including a voltage-controlled oscillator. Each of a phase comparator of the PLL and a synchronous video detector has its input terminal connected to an output terminal of a video IF amplifier by untuned coupling, and arranged on the output side of the synchronous video detector is a phase-locked mode detector for detecting that the PLL is in its phase-locked mode. The phase-locked mode detector is adapted to control the band width of a low-pass filter of the PLL in either a narrow band mode or a wide band mode and the low-pass filter is controlled to operate in the narrow band mode only when the PLL is in the phase-locked mode of operation. The black and white noise included in the output signal of the synchronous video detector are both cancelled by a noise cancellation circuit including a black noise detector for pulse noise cancellation purposes.
摘要翻译：在使用锁相环的同步视频检测器电路中，视频IF信号的同步检测由包括压控振荡器的PLL再现的同步载波信号来实现。 PLL的相位比较器和同步视频检测器中的每一个都具有通过非连续耦合连接到视频IF放大器的输出端的输入端，并且在同步视频检测器的输出侧布置有锁相模式检测器检测到PLL处于其锁相模式。锁相模式检测器适于在窄带模式或宽带模式中控制PLL的低通滤波器的带宽，并且低通滤波器被控制为仅在窄带模式下操作， PLL处于锁相操作模式。包括在同步视频检测器的输出信号中的黑白噪声都被包括用于脉冲噪声消除目的的黑噪声检测器的噪声消除电路消除。

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