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    • 1. 发明授权
    • Method for fabricating varactor diodes using ion implanation
    • 使用离子注入制造变容二极管的方法
    • US4876211A
    • 1989-10-24
    • US230093
    • 1988-08-09
    • Hilda KanberJames C. Chen
    • Hilda KanberJames C. Chen
    • H01L29/93
    • H01L29/93
    • A process for fabricating varactor diodes using ion implantation techniques is described herein. Three successive implanations of N-type ions into a GaAs semi-insulating substrate provide a deep N.sup.+ type conductivity layer about 2-3 microns below the front major surface with concentration of at least 2.times.10.sup.18 ions/cm.sup.3. A fourth implantation of N type ions forms an N type conductivity layer over the N.sup.+ layer. An implanation of P type ions forms the P type conductivity layer over the N type conducitivity layer. A single rapid thermal anneal is performed on the substrate to remove damage to the crystal structure and to electrically activate the implants. The basic doped layered semiconductor structure is thereby produced using ion implantation. This ion implantation process provides a method for fabricating monolithic diode devices reliably and in mass quantities, which can be integrated with other monolithic devices.
    • 本文描述了使用离子注入技术制造变容二极管的方法。 N型离子三次连续注入到GaAs半绝缘衬底中,提供了浓度至少为2×1018离子/ cm3的前主表面下方约2-3微米深的N +型导电层。 N型离子的第四次注入在N +层上形成N型导电层。 P型离子的注入在N型导电层上形成P型导电层。 在衬底上进行单次快速热退火以去除对晶体结构的损伤并电激活植入物。 由此使用离子注入来制造基本掺杂的层状半导体结构。 该离子注入工艺提供了可靠且大批量地制造单片二极管器件的方法,其可与其它单片器件集成。
    • 3. 发明授权
    • Method of fabricating three dimensional gallium arsenide microelectronic
device
    • 制造三维砷化镓微电子器件的方法
    • US5312765A
    • 1994-05-17
    • US59520
    • 1993-05-11
    • Hilda Kanber
    • Hilda Kanber
    • H01L21/8252H01L21/265
    • H01L23/481H01L21/8252H01L2924/0002Y10S148/164Y10S438/928
    • Optoelectronic devices (16) are formed on a first surface (12) of a gallium arsenide substrate (10) using selective ion implantation. Signal processing devices may be formed on a second, opposite surface (14) of the substrate (10) using selective ion implantation (38) and/or selective epitaxy (22,24),(40). Vertical interconnects (34,46) are formed between the first and second surfaces (12,14). Alternatively, a gallium arsenide buffer layer (54) may be grown on the first surface (12) of the substrate (10), and the signal processing devices formed on the buffer layer (54) using selective ion implantation (58,60,62) and/or selective epitaxy (76,78,80,82). Dielectric (50) and/or conductive metal (52) layers may be formed on selected areas of the first surface (12), and the buffer layer (54) grown from exposed areas (56) of the first surface (12) over the dielectric (50) and/or metal (52) layers using lateral epitaxial overgrowth organometallic chemical vapor deposition. The signal processing devices may be formed in areas of the buffer layer (54) which overlie the exposed areas (56) of the substrate (12), and/or over the dielectric (50) and/or metal (52) layers. The present method enables metal-semiconductor field effect transistors (MESFET), high electron mobility transistors (HEMT) and heterojunction bipolar transistors (HBT) to be monolithically integrated in a vertical fashion for close packing density.
    • 使用选择性离子注入在砷化镓衬底(10)的第一表面(12)上形成光电子器件(16)。 信号处理装置可以使用选择性离子注入(38)和/或选择性外延(22,24),(40)形成在衬底(10)的第二相对表面(14)上。 垂直互连(34,46)形成在第一和第二表面(12,14)之间。 或者,可以在衬底(10)的第一表面(12)上生长砷化镓缓冲层(54),并且使用选择性离子注入形成在缓冲层(54)上的信号处理器件(58,60,62 )和/或选择性外延(76,78,80,82)。 电介质(50)和/或导电金属(52)层可以形成在第一表面(12)的选定区域上,并且缓冲层(54)从第一表面(12)的暴露区域(56) 使用横向外延生长有机金属化学气相沉积的电介质(50)和/或金属(52)层。 信号处理装置可以形成在覆盖基板(12)的暴露区域(56)和/或电介质(50)和/或金属(52)层之上的缓冲层(54)的区域中。 本方法使得金属半导体场效应晶体管(MESFET),高电子迁移率晶体管(HEMT)和异质结双极晶体管(HBT)能够以垂直方式单片集成以用于紧密堆积密度。