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    • 3. 发明授权
    • Apparatus and method for verifying custom IC
    • 用于验证定制IC的装置和方法
    • US07669090B2
    • 2010-02-23
    • US11419051
    • 2006-05-18
    • Hideyuki KitazonoToshifumi SatoNaotaka OdaToshiaki ItoMikio Izumi
    • Hideyuki KitazonoToshifumi SatoNaotaka OdaToshiaki ItoMikio Izumi
    • G01R31/28G11C29/00G01R31/26G06F11/00
    • G01R31/317
    • An apparatus for verifying a custom IC including a test pattern generating unit for generating a test pattern for verifying a function of the custom IC. The test pattern is output to a master IC and a test IC. The apparatus further includes a comparing unit connected to receive operation signals output from the master IC and the test IC for comparing the operation signals to see if the operation signals are agreed with each other and for generating a comparison signal based on a comparison result, a judging unit connected to receive the comparison signal for judging if there is any abnormality in the test IC and for outputting a judged signal based on a judged result, and a computer connected to receive the judged signal for displaying the judged result of the test IC.
    • 一种用于验证定制IC的装置,包括用于生成用于验证定制IC的功能的测试图案的测试图案生成单元。 测试模式输出到主IC和测试IC。 该装置还包括一个比较单元,连接到接收从主IC输出的操作信号和测试IC,用于比较操作信号,以观察操作信号是否彼此一致,并根据比较结果生成比较信号 连接的判断单元接收比较信号,以判断测试IC中是否存在异常,并根据判断结果输出判断信号;以及计算机,连接以接收用于显示测试IC的判断结果的判断信号。
    • 4. 发明申请
    • APPARATUS AND METHOD FOR VERIFYING CUSTOM IC
    • 用于验证定制IC的装置和方法
    • US20070271489A1
    • 2007-11-22
    • US11419051
    • 2006-05-18
    • Hideyuki KitazonoToshifumi SatoNaotaka OdaToshiaki ItoMikio Izumi
    • Hideyuki KitazonoToshifumi SatoNaotaka OdaToshiaki ItoMikio Izumi
    • G01R31/28
    • G01R31/317
    • An apparatus for verifying a custom IC including a test pattern generating unit for generating a test pattern for verifying a function of the custom IC. The test pattern is output to a master IC and a test IC. The apparatus further includes a comparing unit connected to receive operation signals output from the master IC and the test IC for comparing the operation signals to see if the operation signals are agreed with each other and for generating a comparison signal based on a comparison result, a judging unit connected to receive the comparison signal for judging if there is any abnormality in the test IC and for outputting a judged signal based on a judged result, and a computer connected to receive the judged signal for displaying the judged result of the test IC.
    • 一种用于验证定制IC的装置,包括用于生成用于验证定制IC的功能的测试图案的测试图案生成单元。 测试模式输出到主IC和测试IC。 该装置还包括一个比较单元,连接到接收从主IC输出的操作信号和测试IC,用于比较操作信号,以观察操作信号是否彼此一致,并根据比较结果生成比较信号 连接的判断单元接收比较信号,以判断测试IC中是否存在异常,并根据判断结果输出判断信号;以及计算机,连接以接收用于显示测试IC的判断结果的判断信号。
    • 5. 发明申请
    • METHOD FOR VERIFYING SAFETY APPARATUS AND SAFETY APPARATUS VERIFIED BY THE SAME
    • 验证其安全装置和安全装置的方法
    • US20090164955A1
    • 2009-06-25
    • US12372518
    • 2009-02-17
    • Mikio IzumiToshifumi HayashiShigeru OdanakaHirotaka SakaiNaotaka OdaToshifumi SatoToshiaki Ito
    • Mikio IzumiToshifumi HayashiShigeru OdanakaHirotaka SakaiNaotaka OdaToshifumi SatoToshiaki Ito
    • G06F17/50
    • G06F17/5027
    • A verification method is provided for verifying a safety apparatus including a programmable logic device having a plurality of functional elements. The verification method includes the steps of exhaustively verifying the plurality of functional elements on actual hardware, generating a functional element that is the same as one of the functional elements verified on the actual apparatus using a predetermined hardware description language, independently logic-synthesizing each generated functional element into a plurality of first net lists, generating a connection function between the functional elements using the predetermined hardware description language, logic-synthesizing the generated connection function into a second net list corresponding to the connection function, synthesizing the first net lists with the second net list to generate a third net list, writing a logic circuit into the programmable logic device on the basis of the third net list, and verifying the actual programmable logic device.
    • 提供了一种用于验证包括具有多个功能元件的可编程逻辑器件的安全装置的验证方法。 验证方法包括以下步骤:在实际硬件上彻底验证多个功能元件,生成与使用预定的硬件描述语言在实际装置上验证的功能元件中的一个功能元件相同的功能元件,独立地逻辑合成每个产生的功能元件 功能元件组合成多个第一网络列表,使用预定的硬件描述语言在功能元件之间生成连接功能,将生成的连接功能逻辑合成到与连接功能相对应的第二网络列表中,将第一网络列表与 第二网络列表以产生第三网络列表,基于第三网络列表将逻辑电路写入可编程逻辑设备,以及验证实际的可编程逻辑设备。
    • 6. 发明授权
    • Method for verifying safety apparatus and safety apparatus verified by the same
    • 用于验证其验证的安全装置和安全装置的方法
    • US07512917B2
    • 2009-03-31
    • US11360617
    • 2006-02-24
    • Mikio IzumiToshifumi HayashiShigeru OdanakaHirotaka SakaiNaotaka OdaToshifumi SatoToshiaki Ito
    • Mikio IzumiToshifumi HayashiShigeru OdanakaHirotaka SakaiNaotaka OdaToshifumi SatoToshiaki Ito
    • G06F17/50
    • G06F17/5027
    • A verification method is provided for verifying a safety apparatus including a programmable logic device having a plurality of functional elements. The verification method includes the steps of exhaustively verifying the plurality of functional elements on actual hardware, generating a functional element that is the same as one of the functional elements verified on the actual apparatus using a predetermined hardware description language, independently logic-synthesizing each generated functional element into a plurality of first net lists, generating a connection function between the functional elements using the predetermined hardware description language, logic-synthesizing the generated connection function into a second net list corresponding to the connection function, synthesizing the first net lists with the second net list to generate a third net list, writing a logic circuit into the programmable logic device on the basis of the third net list, and verifying the actual programmable logic device.
    • 提供了一种用于验证包括具有多个功能元件的可编程逻辑器件的安全装置的验证方法。 验证方法包括以下步骤:在实际硬件上彻底验证多个功能元件,生成与使用预定的硬件描述语言在实际装置上验证的功能元件中的一个功能元件相同的功能元件,独立地逻辑合成每个产生的功能元件 功能元件组合成多个第一网络列表,使用预定的硬件描述语言在功能元件之间生成连接功能,将生成的连接功能逻辑合成到与连接功能相对应的第二网络列表中,将第一网络列表与 第二网络列表以产生第三网络列表,基于第三网络列表将逻辑电路写入可编程逻辑设备,以及验证实际的可编程逻辑设备。