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1. 发明授权

US6153522A Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US6153522A
公开(公告)日：2000-11-28
申请号：US179886
申请日：1998-10-28
申请人： Hideo Takagi , Shigetaka Uji , Shyoji Hirao
发明人： Hideo Takagi , Shigetaka Uji , Shyoji Hirao
IPC分类号： H01L21/28 , H01L21/285 , H01L21/288 , H01L21/3205 , H01L21/768 , H01L23/52 , H05K3/06 , H01L21/44
CPC分类号： H01L21/7684 , H01L21/76882
摘要： A semiconductor device manufacturing method of the present invention comprises the steps of forming a groove on an insulating film formed over a semiconductor substrate, forming a first copper film on the insulating film and in the groove by sputtering using a target, reflowing the first copper film by heating it, growing a second copper film on the first copper film by plating or chemical vapor deposition, and removing the second copper film and the first copper film on the insulating film by chemical mechanical polishing to remain at least the first copper film in the groove. Accordingly, in the semiconductor device manufacturing method to provide copper wirings, increase in resistance can be suppressed by firmly embedding copper into the groove and also electromigration resistance of copper wirings can be improved.
摘要翻译：本发明的半导体器件制造方法包括以下步骤：在半导体衬底上形成绝缘膜上形成沟槽，在绝缘膜上形成第一铜膜，通过使用靶溅射形成沟槽，回流第一铜膜通过加热，通过电镀或化学气相沉积在第一铜膜上生长第二铜膜，并通过化学机械抛光去除绝缘膜上的第二铜膜和第一铜膜，以至少将第一铜膜保留在槽。因此，在提供铜布线的半导体器件制造方法中，通过将铜牢固地嵌入槽中可以抑制电阻的增加，并且还可以提高铜布线的电迁移阻力。

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