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    • 3. 发明授权
    • Integrated circuit device and electronic instrument
    • 集成电路器件和电子仪器
    • US08125269B2
    • 2012-02-28
    • US11545625
    • 2006-10-10
    • Hiroaki NomizoAtsushi IshikawaTsuyoshi Tamura
    • Hiroaki NomizoAtsushi IshikawaTsuyoshi Tamura
    • H03K17/687
    • H03K19/00361H01L27/0251
    • An integrated circuit device includes an I/O circuit which buffers and outputs an input signal D from a pad when an enable signal ENB is set at a second voltage level, a circuit block to which an output signal from the I/O circuit is input, and a malfunction prevention circuit which outputs to the circuit block an output signal QP of which a voltage level is set by a first power supply VDDC in a period T1 in which the signal ENB is set at a first voltage level and a period T2 including a period in which the signal ENB changes from the first voltage level to the second voltage level, and outputs to the circuit block the output signal QP corresponding to an output signal QI from the I/O circuit in a period T3 in which the signal ENB is set at the second voltage level.
    • 集成电路装置包括I / O电路,当使能信号ENB被设置在第二电压电平时,I / O电路缓冲并输出来自焊盘的输入信号D,输入来自I / O电路的输出信号的电路块 以及故障防止电路,其在信号ENB被设定为第一电压电平的期间T1中输出电路块中由第一电源VDDC设定电压电平的输出信号QP,以及包括 信号ENB从第一电压电平变化到第二电压电平的时段,并且在信号ENB的时段T3中向I / O电路输出对应于来自I / O电路的输出信号QI的输出信号QP 被设置在第二电压电平。
    • 4. 发明申请
    • Integrated circuit device and electronic instrument
    • 集成电路器件和电子仪器
    • US20070082626A1
    • 2007-04-12
    • US11545625
    • 2006-10-10
    • Hiroaki NomizoAtsushi IshikawaTsuyoshi Tamura
    • Hiroaki NomizoAtsushi IshikawaTsuyoshi Tamura
    • H01Q11/12H04B1/16H04B1/04
    • H03K19/00361H01L27/0251
    • An integrated circuit device includes an I/O circuit which buffers and outputs an input signal D from a pad when an enable signal ENB is set at a second voltage level, a circuit block to which an output signal from the I/O circuit is input, and a malfunction prevention circuit which outputs to the circuit block an output signal QP of which a voltage level is set by a first power supply VDDC in a period T1 in which the signal ENB is set at a first voltage level and a period T2 including a period in which the signal ENB changes from the first voltage level to the second voltage level, and outputs to the circuit block the output signal QP corresponding to an output signal QI from the I/O circuit in a period T3 in which the signal ENB is set at the second voltage level.
    • 集成电路装置包括I / O电路,当使能信号ENB被设置在第二电压电平时,I / O电路缓冲并输出来自焊盘的输入信号D,输入来自I / O电路的输出信号的电路块 以及故障防止电路,其在信号ENB被设定为第一电压电平的周期T 1中向电路块输出由第一电源VDDC设定电压电平的输出信号QP,周期T 2包括信号ENB从第一电压电平变化到第二电压电平的时段,并且在周期T 3中将与来自I / O电路的输出信号QI相对应的输出信号QP输出到电路块,其中 信号ENB被设置在第二电压电平。
    • 5. 发明申请
    • Display driver, electro-optical device, electronic instrument, and drive method
    • 显示驱动器,电光器件,电子仪器和驱动方法
    • US20070080915A1
    • 2007-04-12
    • US11543442
    • 2006-10-05
    • Hiroaki Nomizo
    • Hiroaki Nomizo
    • G09G3/36
    • G09G3/3648G09G2320/0257G09G2340/16
    • A display driver includes a display memory 100 which stores grayscale data, a correction calculation section 110 which corrects input grayscale data in units of dots forming one pixel, a line buffer 130 which stores corrected data of one scan line corrected by the correction calculation section 110, and a driver section 140 which drives an electro-optical device based on the grayscale data read from the display memory 100 or the corrected data read from the line buffer 130. The correction calculation section 140 generates the corrected data based on the grayscale data read from the display memory 100 and the input grayscale data. The driver section 140 drives the electro-optical device based on the corrected data, and then drives the electro-optical device based on the grayscale data read from the display memory.
    • 显示驱动器包括存储灰阶数据的显示存储器100,校正计算部分110,校正以形成一个像素的点为单位的输入灰度数据;行缓冲器130,其存储由校正计算部分110校正的一条扫描线的校正数据 以及驱动器部140,其基于从显示存储器100读取的灰度数据或从行缓冲器130读取的校正数据来驱动电光装置。校正计算部140基于读取的灰度数据生成校正数据 从显示存储器100和输入灰度数据。 驱动器部分140基于校正数据驱动电光装置,然后基于从显示存储器读取的灰度数据驱动电光装置。