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    • 2. 发明授权
    • Image display
    • 图像显示
    • US06704009B2
    • 2004-03-09
    • US09882032
    • 2001-06-18
    • Miyuki TachibanaHiroki Iwataka
    • Miyuki TachibanaHiroki Iwataka
    • G09G500
    • G09G5/008G09G5/005G09G5/006G09G2340/04
    • An image display in which occurrence of beat noise can be suppressed without adding noise to an image in a pixel converting process is provided. The frequency of a data clock is preset to a value at which beat noise is not apt to occur (a value such that one of the dot clock frequency of the input analog video signal and the frequency of the data clock is not equal to or close to an integral multiple of the other) for each kind of the input analog video signal and is stored as a frequency correspondence list in a memory MM. In accordance with the kind of the input analog video signal, a control block 4 selects the set frequency of the data clock and allows a data clock generating block 6 to generate a data clock Cd. Consequently, at the time of a pixel converting process performed by a signal processing block 5, without adding noise to an image, occurrence of beat noise is suppressed.
    • 提供了一种在像素转换处理中不会对图像增加噪声的情况下可以抑制发生拍子噪声的图像显示。 数据时钟的频率被预先设定为不能发生拍频的值(使输入的模拟视频信号的点时钟频率和数据时钟的频率之一不等于或接近的值 到另一个的整数倍),并且作为频率对应列表存储在存储器MM中。 根据输入模拟视频信号的种类,控制块4选择数据时钟的设定频率,并允许数据时钟产生块6产生数据时钟Cd。 因此,在由信号处理块5执行的像素转换处理时,在不对图像增加噪声的情况下,抑制了拍频的发生。
    • 3. 发明授权
    • Image display apparatus
    • 图像显示装置
    • US06700570B2
    • 2004-03-02
    • US09880851
    • 2001-06-15
    • Miyuki TachibanaHiroki Iwataka
    • Miyuki TachibanaHiroki Iwataka
    • G09G500
    • G09G5/008
    • A difference in sampling data of continuous two pixels in a digital image signal is detected. A CPU monitors the value of an output signal and determines a control value of a control signal so as to make the difference greatest. In a sampling clock generation section, a sampling clock that is synchronous to a dot clock by a synchronous signal and the control signal is generated. When the difference becomes greatest, it is possible to sample an image signal level that is less susceptible to influences from rounding, and consequently to adjust the phase of the sampling clock without an input signal having a specific pattern.
    • 检测数字图像信号中的连续两个像素的采样数据的差异。 CPU监视输出信号的值,并确定控制信号的控制值,使差值最大。 在采样时钟产生部分中,产生与同步信号的点时钟同步的采样时钟和控制信号。 当差值变大时,可以对不易受四舍五入影响的图像信号电平进行采样,从而调整采样时钟的相位,而不需要具有特定图案的输入信号。