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    • 1. 发明申请
    • IMAGE COMPRESSION APPARATUS
    • 图像压缩装置
    • US20100104206A1
    • 2010-04-29
    • US12408901
    • 2009-03-23
    • Masahiro MoriyamaYujiro TaniYusuke MizunoHideki DaianNobuhiro MinamiHiromu Hasegawa
    • Masahiro MoriyamaYujiro TaniYusuke MizunoHideki DaianNobuhiro MinamiHiromu Hasegawa
    • G06K9/00
    • H04N19/436H04N19/60
    • An image compression apparatus performs quantization of DC component data, low-pass component data and high-pass component data which are generated by frequency conversion of still image data. An extracting part extracts additional data and coding object data which is to be entropy coded, from quantization data. An entropy coding part performs entropy coding of the coding object data stored in a coding object data memory. An additional data processing part generates a flex bit from the additional data. A pattern information generation part acquires the coding object data directly from the extracting part, to generate pattern information indicating whether the coding object data is zero or not. A bit stream generation part outputs the pattern information, the coding object data and the flex bit in a predetermined order, to output a bit stream.
    • 图像压缩装置执行通过静止图像数据的频率转换而产生的直流分量数据,低通分量数据和高通分量数据的量化。 提取部分从量化数据中提取要进行熵编码的附加数据和编码对象数据。 熵编码部对存储在编码对象数据存储器中的编码对象数据进行熵编码。 附加数据处理部分从附加数据生成flex位。 图案信息生成部直接从提取部获取编码对象数据,生成表示编码对象数据是否为零的图案信息。 比特流生成部以预定顺序输出图案信息,编码对象数据和柔性位,以输出比特流。
    • 3. 发明授权
    • Image compression apparatus
    • 图像压缩装置
    • US08160376B2
    • 2012-04-17
    • US12408901
    • 2009-03-23
    • Masahiro MoriyamaYujiro TaniYusuke MizunoHideki DaianNobuhiro MinamiHiromu Hasegawa
    • Masahiro MoriyamaYujiro TaniYusuke MizunoHideki DaianNobuhiro MinamiHiromu Hasegawa
    • G06K9/46
    • H04N19/436H04N19/60
    • An image compression apparatus performs quantization of DC component data, low-pass component data and high-pass component data which are generated by frequency conversion of still image data. An extracting part extracts additional data and coding object data which is to be entropy coded, from quantization data. An entropy coding part performs entropy coding of the coding object data stored in a coding object data memory. An additional data processing part generates a flex bit from the additional data. A pattern information generation part acquires the coding object data directly from the extracting part, to generate pattern information indicating whether the coding object data is zero or not. A bit stream generation part outputs the pattern information, the coding object data and the flex bit in a predetermined order, to output a bit stream.
    • 图像压缩装置执行通过静止图像数据的频率转换而产生的直流分量数据,低通分量数据和高通分量数据的量化。 提取部分从量化数据中提取要进行熵编码的附加数据和编码对象数据。 熵编码部对存储在编码对象数据存储器中的编码对象数据进行熵编码。 附加数据处理部分从附加数据生成flex位。 图案信息生成部直接从提取部获取编码对象数据,生成表示编码对象数据是否为零的图案信息。 比特流生成部以预定顺序输出图案信息,编码对象数据和柔性位,以输出比特流。
    • 9. 发明授权
    • Memory device that mediates mutual communication among a pluraliity of CPUs
    • 调节多个CPU之间的相互通信的存储器件
    • US08131893B2
    • 2012-03-06
    • US11780057
    • 2007-07-19
    • Gen SasakiMasahiro Moriyama
    • Gen SasakiMasahiro Moriyama
    • G06F3/00H03K19/00
    • G06F13/1663
    • In a memory device, data can be transmitted from a first CPU to a second CPU via an individual register or a shared SRAM, for example. The data transmitted from the first CPU to the second CPU via the individual register also passes through a FIFO. When first data is transmitted via the shared SRAM and then second data is transmitted via the individual register, for example, and if the first data transmission is adjusted by a SRAM controller and put into a waiting state at the FIFO, the second data transmitted via the individual register also passes through the FIFO, preventing the second data transmission from being completed earlier than the first data transmission. The data transmissions can therefore be completed appropriately. This in turn increases reliability of the memory device.
    • 在存储器装置中,例如可以通过单个寄存器或共享SRAM从第一CPU向第二CPU发送数据。 从第一CPU向第二CPU经由个别寄存器发送的数据也通过FIFO。 当通过共享SRAM发送第一数据,然后例如经由各个寄存器发送第二数据时,如果由SRAM控制器调整第一数据传输并在FIFO处于等待状态,则经由 单个寄存器也通过FIFO,从而防止在第一数据传输之前完成第二数据传输。 因此,可以适当地完成数据传输。 这又增加了存储器件的可靠性。