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    • 1. 发明申请
    • CURRENT-MODE CONTROLLED DC-DC CONVERTER
    • 电流模式控制DC-DC转换器
    • US20090262555A1
    • 2009-10-22
    • US12250839
    • 2008-10-14
    • Hideki AsukeHideharu TakanoMasaki KanazawaMamoru TsuruyaMasayoshi YamamotoHiroyuki HoriiShigeyuki Funabiki
    • Hideki AsukeHideharu TakanoMasaki KanazawaMamoru TsuruyaMasayoshi YamamotoHiroyuki HoriiShigeyuki Funabiki
    • H02M3/335
    • H02M3/1584H02M2001/0064
    • A current-mode controlled DC-DC converter includes a comparator comparing a first or second current detection signal with a first or second reference current that is based on an error voltage of a voltage detection signal, a pulse generator generating a first pulse signal whose ON time is longer than an interval between when the second current detection signal reaches a minimum value and when the second current detection signal reaches the second reference current, a pulse generator generating a second pulse signal whose ON time is longer than an interval between when the first current detection signal reaches a minimum value and when the first current detection signal reaches the first reference current, the second pulse signal being behind the first pulse signal by a half period, and a PWM circuit generating a first or second PWM signal according to the pulse signal and an output signal from the comparator, thereby turning on/off a switch.
    • 电流模式控制的DC-DC转换器包括比较第一或第二电流检测信号与基于电压检测信号的误差电压的第一或第二参考电流的比较器,脉冲发生器产生第一脉冲信号,其ON 时间长于当第二电流检测信号达到最小值之间的间隔和当第二电流检测信号达到第二参考电流时的间隔;脉冲发生器,其生成第二脉冲信号,其接通时间长于第一电流检测信号之间的间隔 电流检测信号达到最小值,并且当第一电流检测信号达到第一参考电流时,第二脉冲信号在第一脉冲信号之后半个周期,PWM电路根据脉冲产生第一或第二PWM信号 信号和来自比较器的输出信号,从而打开/关闭开关。
    • 2. 发明授权
    • Current-mode controlled DC-DC converter
    • 电流模式控制DC-DC转换器
    • US07915875B2
    • 2011-03-29
    • US12250839
    • 2008-10-14
    • Hideki AsukeHideharu TakanoMasaki KanazawaMamoru TsuruyaMasayoshi YamamotoHiroyuki HoriiShigeyuki Funabiki
    • Hideki AsukeHideharu TakanoMasaki KanazawaMamoru TsuruyaMasayoshi YamamotoHiroyuki HoriiShigeyuki Funabiki
    • G05F1/24G05F1/40
    • H02M3/1584H02M2001/0064
    • A current-mode controlled DC-DC converter includes a comparator comparing a first or second current detection signal with a first or second reference current that is based on an error voltage of a voltage detection signal, a pulse generator generating a first pulse signal whose ON time is longer than an interval between when the second current detection signal reaches a minimum value and when the second current detection signal reaches the second reference current, a pulse generator generating a second pulse signal whose ON time is longer than an interval between when the first current detection signal reaches a minimum value and when the first current detection signal reaches the first reference current, the second pulse signal being behind the first pulse signal by a half period, and a PWM circuit generating a first or second PWM signal according to the pulse signal and an output signal from the comparator, thereby turning on/off a switch.
    • 电流模式控制的DC-DC转换器包括比较第一或第二电流检测信号与基于电压检测信号的误差电压的第一或第二参考电流的比较器,脉冲发生器产生第一脉冲信号,其ON 时间长于当第二电流检测信号达到最小值之间的间隔和当第二电流检测信号达到第二参考电流时的间隔;脉冲发生器,其生成第二脉冲信号,其接通时间长于第一电流检测信号之间的间隔 电流检测信号达到最小值,并且当第一电流检测信号达到第一参考电流时,第二脉冲信号在第一脉冲信号之后半个周期,PWM电路根据脉冲产生第一或第二PWM信号 信号和来自比较器的输出信号,从而打开/关闭开关。
    • 8. 发明申请
    • Solenoid drive circuit
    • 电磁驱动电路
    • US20050105239A1
    • 2005-05-19
    • US10942589
    • 2004-09-15
    • Kiyokatsu SatohMasaki Kanazawa
    • Kiyokatsu SatohMasaki Kanazawa
    • H01F7/18H01H47/00H01H47/32
    • H01H47/325H01F7/1844H01F2007/1888H01H47/002
    • A solenoid drive circuit includes a control circuit 2 which comprises a detector 6 with a resistor 6a for discerning current flow therethrough to produce electric signals that correspond to level of current flow through a solenoid 4 connected to the resistor 6a; an amplifier 7 for amplifying the electric signals from the resistor 6a; and an integrator 8 for integrating the amplified output from the amplifier 7. As integrator 8 is reset each time a PWM controller 3 generates at least one of the successive drive signals S3, an operational comparator 5 receives the latest updated and integrated values S8 of relatively small amount from the integrator 8, easily and promptly compares the updated values S8 from the integrator 8 and an objective current values to produce a deviation of the integrated values S8 from the objective current value, and provides the PWM controller 3 with a command value S5 indicative of the deviation. As the PWM controller 3 provides the control terminal of a MOSFET 10 with the drive signals S3 of pulse width which corresponds to the command value S5 from the operational comparator 5, the current flow through the solenoid 4 can be controlled for accurate activation of the solenoid 4 in good responsiveness to current flow values through the solenoid 4.
    • 一个电磁驱动电路包括一个控制电路2,它包括一个具有电阻器6a的检测器6,用于识别通过其中的电流流动,产生对应于通过连接到电阻器6a的螺线管4的电流水平的电信号; 用于放大来自电阻器6a的电信号的放大器7; 以及用于积分放大器7的放大输出的积分器8.当每个PWM控制器3产生连续驱动信号S 3中的至少一个时,积分器8被复位,运算比较器5接收最新的更新和积分值S 8 从积分器8相对较少的量,容易且迅速地将积分器8的更新值S8与目标电流值进行比较,以产生积分值S8与目标电流值的偏差,并向PWM控制器3提供 指示偏差的指令值S 5。 由于PWM控制器3向MOSFET10的控制端提供与来自运算比较器5的与指令值S5相对应的脉冲宽度的驱动信号S 3,所以可以控制通过螺线管4的电流以精确地激活 螺线管4对通过螺线管4的电流流动值具有良好的响应性。
    • 9. 发明授权
    • Wafer grinding machine and wafer grinding method
    • 晶圆磨机和晶圆磨削法
    • US08206198B2
    • 2012-06-26
    • US12337546
    • 2008-12-17
    • Masaki Kanazawa
    • Masaki Kanazawa
    • B24B1/00
    • B24B7/228B24B55/00H01L21/304
    • A wafer grinding machine and a wafer grinding method are disclosed. A barrier (60) is arranged around a holding unit (29) to hold at least a wafer (40) with a film (11) attached on the front surface (41) thereof and with the back surface (42) thereof directed upward. The upper surface (61) of the barrier unit is ground to the position between the back surface of the wafer held by the holding unit and the boundary between the wafer and the film. Then, the wafer is ground while being held with the back surface thereof up by the holding unit. As a result, the film is prevented from coming off from the wafer at the time of grinding the back surface of the wafer. Further, when the wafer is ground, a fluid may be supplied into the gap between the barrier unit and the outer peripheral portion of the wafer held by the holding unit.
    • 公开了晶片研磨机和晶片研磨方法。 阻挡件(60)围绕保持单元(29)布置以至少保持具有附接在其前表面(41)上的膜(11)并且其后表面(42)指向的晶片(40)。 阻挡单元的上表面(61)被研磨到由保持单元保持的晶片的背面与晶片与膜之间的边界之间的位置。 然后,晶片被保持单元保持在其后表面的同时被研磨。 结果,在研磨晶片的背面时,防止膜从晶片脱落。 此外,当晶片被研磨时,可以将流体供应到阻挡单元与由保持单元保持的晶片的外周部之间的间隙中。