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1. 发明授权

US5606370A Sync restoring method for variable-length decoding and apparatus thereof 失效
标题翻译：用于可变长度解码的同步恢复方法及其装置
公开(公告)号：US5606370A
公开(公告)日：1997-02-25
申请号：US499900
申请日：1995-07-11
申请人： Heon-hee Moon
发明人： Heon-hee Moon
IPC分类号： H03M7/40 , H04L7/00 , H04N19/00 , H04N19/102 , H04N19/166 , H04N19/176 , H04N19/196 , H04N19/50 , H04N19/61 , H04N19/625 , H04N19/63 , H04N19/65 , H04N19/67 , H04N19/68 , H04N19/70 , H04N19/89 , H04N19/895 , H04N19/91 , H04N7/26
CPC分类号： H04N19/00 , H04N19/61 , H04N19/89 , H04N19/13 , H04N19/30 , H04N19/60 , H04N19/70 , H04N19/91
摘要： A sync restoring apparatus includes a first-in-first-out (FIFO) memory for storing the variable-length-coded data and sequentially outputting a predetermined number of bits of data according to a read signal, a decoder for variable-length-decoding the applied data, outputting the block end signal obtained by the decoding operation, and generating a data request signal every time the number of bits of data used in the decoding operation becomes a predetermined number of bits, an error detector for generating an error signal when the number of the block end signals which are not decoded at the exact variable-length-decoding time is not less than a predetermined limit value based on the data format, and an interfacer coupled to transmit the data applied from the FIFO memory according to the read signal, and if the error signal is not generated in the error detector, generating a read signal according to the data request signal generated from the variable-length-decoder, while if the error signal is generated in the error detector, generating read signals until error-detected second block data is wholly read from the FIFO memory, independently of the data request signal, and a controller for controlling the decoder so as to stop the decoding operation when the error signal output from the error detector is applied to the controller, while when the second block data is supplied to the decoder, the decoding operation is performed.
摘要翻译：同步恢复装置包括：先进先出（FIFO）存储器，用于存储可变长度编码数据，并根据读取信号依次输出预定数量的数据位;解码器，用于可变长度解码应用数据，输出通过解码操作获得的块结束信号，并且每当在解码操作中使用的数据的位数变为预定位数时产生数据请求信号，用于当在精确的可变长度解码时间未解码的块结束信号的数量不小于基于数据格式的预定极限值，并且耦合到根据该数据格式发送从FIFO存储器施加的数据的接口读出信号，如果错误检测器中不产生误差信号，则根据从可变长度解码器生成的数据请求信号生成读取信号，而如果错误信号在误差检测器中产生信号，产生读取信号，直到从数据请求信号独立地从FIFO存储器全部读出错误检测的第二数据块数据，以及用于控制解码器的控制器，以便在错误时停止解码操作来自误差检测器的信号输出被施加到控制器，而当第二块数据被提供给解码器时，执行解码操作。

2. 发明授权

US07720150B2 Pixel data selection device for motion compensated interpolation and method thereof 有权
标题翻译：用于运动补偿插值的像素数据选择装置及其方法
公开(公告)号：US07720150B2
公开(公告)日：2010-05-18
申请号：US10219295
申请日：2002-08-16
申请人： Sung-hee Lee , Heon-hee Moon
发明人： Sung-hee Lee , Heon-hee Moon
IPC分类号： H04B1/66
CPC分类号： H04N7/014
摘要： A pixel data selection device for motion compensated interpolation and a method thereof selects pixel data in adjacent frame/fields. First and second storage portions respectively store first pixel data corresponding to a motion vector of a first frame/field that is obtained by delaying an input frame/field and second pixel data corresponding to the motion vector of a second frame/field that is obtained by delaying the first frame/field one or more times. First and second pixel data extracting portions extract individual pixel data from the first and the second pixel data corresponding to a candidate motion vector. First and second optimum pixel outputting portions output optimum pixel data for motion compensation from the extracted individual pixel data. By selecting the optimum pixel data from the adjacent frame/field of an interpolated frame/field having a current block and candidate blocks corresponding to a plurality of motion trajectories, occurrence of blocking artifacts due to inaccurate estimate of motion vectors can be reduced.
摘要翻译：一种运动补偿内插的像素数据选择装置及其选择相邻帧/场中的像素数据的方法。第一和第二存储部分别存储对应于通过延迟输入帧/场而获得的第一帧/场的运动矢量的第一像素数据和与第二帧/场的运动矢量对应的第二像素数据，第二帧/场是通过延迟第一帧/场一次或多次。第一和第二像素数据提取部分从与候选运动矢量对应的第一和第二像素数据中提取单个像素数据。第一和第二最佳像素输出部分从所提取的各个像素数据输出用于运动补偿的最佳像素数据。通过从具有当前块和与多个运动轨迹相对应的候选块的内插帧/场的相邻帧/场的相邻帧/场选择最佳像素数据，可以减少由于运动矢量的不准确估计导致的块伪影的发生。

3. 发明授权

US5896405A Apparatus for restoring a digital transmission signal 失效
标题翻译：用于恢复数字传输信号的装置
公开(公告)号：US5896405A
公开(公告)日：1999-04-20
申请号：US588698
申请日：1996-01-19
申请人： Heon-hee Moon
发明人： Heon-hee Moon
IPC分类号： H04L1/00 , H04L27/38 , G06F11/10 , H03M13/12
CPC分类号： H04L1/0047 , H04L1/0054 , H04L1/0071 , H04L27/38
摘要： An apparatus for receiving data block-interleaved and multi level/phase modulated data and restoring the block-interleaved multi level/phase modulated data into original data, comprises a demodulation and error correction portion for demodulating and error-correcting data to be received and outputting the modulated and error-corrected data; a synchronization portion for generating a fixed sync position signal, based on the comparison between the data output from the demodulation and error correction portion and stored block sync data; and a block deinterleaver for block-deinterleaving the data which is output from the demodulation and error correction portion according to the fixed sync position signal. The apparatus makes certain that a sync signal for block deinterleaving is identical to a sync signal at the transmission end and performs block deinterleaving even though no error correction is made. Furthermore, the present invention is capable of reliably detecting a sync signal, even when the sync signal is momentarily deviated because error correction is not completely made.
摘要翻译：一种用于接收数据块交错和多电平/相位调制数据并将块交织的多电平/相位调制数据恢复为原始数据的装置，包括用于解调和纠错待接收数据的解调和纠错部分，并输出调制和纠错数据; 基于从解调和纠错部分输出的数据与存储的块同步数据之间的比较产生固定同步位置信号的同步部分; 以及块解交织器，用于根据固定同步位置信号块解交织从解调和纠错部分输出的数据。该装置确定用于块去交织的同步信号与发送端的同步信号相同，并且即使没有进行纠错，也执行块去交织。此外，即使由于错误校正不完全而使同步信号暂时偏离，本发明也能够可靠地检测同步信号。

4. 发明授权

US5566192A Variable-length decoder for bit-stuffed data 失效
标题翻译：用于位填充数据的可变长度解码器
公开(公告)号：US5566192A
公开(公告)日：1996-10-15
申请号：US454738
申请日：1995-05-31
申请人： Heon-hee Moon
发明人： Heon-hee Moon
IPC分类号： H03M7/40 , G06T9/00 , H03M7/42 , H04J3/06 , H04L7/08 , H04N7/24 , H04N7/54 , H04N7/62 , G06F11/00
CPC分类号： H04N21/434 , H03M7/425 , H04N19/152 , H04N7/54 , H04N19/50 , H04N21/23611
摘要： A variable-length decoder variable-length-decodes a received variable-length-encoded data. The variable-length-encoded data is bit-stuffed in each data block to create data portions with a predetermined number of bits. Frame start codes representing a start of each frame and mass of macroblock start codes distinguishing between a plurality of masses of macroblocks are inserted into the data. Synchronization of data between frames and masses of macroblocks are accomplished via: a first-in-first-out (FIFO) memory which stores encoded data; a decoder which variable-length-decodes the input data in response to a control signal and generates an end-of-block (EOB) error signal when an EOB is not found; a decoding interface which interfaces between the decoder and a timing controller; and a timing controller which synchronizes decoding by use of start and initialization signals.
摘要翻译：可变长度解码器可变长度解码接收到的可变长度编码数据。可变长度编码的数据在每个数据块中被填充以创建具有预定位数的数据部分。表示每帧开始的帧起始码和区分多个宏块块的宏块开始码的质量被插入到数据中。通过以下方式来实现帧与宏块质量之间的数据同步：存储编码数据的先进先出（FIFO）存储器; 解码器，其响应于控制信号对输入数据进行可变长度解码，并且当未找到EOB时产生块结束（EOB）错误信号; 解码接口，其在解码器和定时控制器之间进行接口; 以及通过使用起始和初始化信号来同步解码的定时控制器。

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