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1. 发明授权

US07915664B2 Non-volatile memory with sidewall channels and raised source/drain regions 有权
标题翻译：具有侧壁通道和升高的源极/漏极区域的非易失性存储器
公开(公告)号：US07915664B2
公开(公告)日：2011-03-29
申请号：US12105242
申请日：2008-04-17
申请人： Henry Chien , Takashi Orimoto , George Matamis , James Kai , Vinod R. Purayath
发明人： Henry Chien , Takashi Orimoto , George Matamis , James Kai , Vinod R. Purayath
IPC分类号： H01L29/788
CPC分类号： G11C8/10 , G11C8/04 , G11C11/5621 , G11C16/0483 , G11C19/00 , H01L21/28273 , H01L27/11521
摘要： A non-volatile storage system in which a sidewall insulating layer of a floating gate is significantly thinner than a thickness of a bottom insulating layer, and in which raised source/drain regions are provided. During programming or erasing, tunneling occurs predominantly via the sidewall insulating layer and the raised source/drain regions instead of via the bottom insulating layer. The floating gate may have a uniform width or an inverted T shape. The raised source/drain regions may be epitaxially grown from the substrate, and may include a doped region above an undoped region so that the channel length is effectively extended from beneath the floating gate and up into the undoped regions, so that short channel effects are reduced. The ratio of the thicknesses of the sidewall insulating layer to the bottom insulating layer may be about 0.3 to 0.67.
摘要翻译：一种非易失性存储系统，其中浮动栅极的侧壁绝缘层比底部绝缘层的厚度明显薄，并且其中设置有凸起的源极/漏极区域。在编程或擦除期间，隧道主要通过侧壁绝缘层和凸起的源极/漏极区域而不是通过底部绝缘层发生。浮动门可以具有均匀的宽度或倒T形。凸起的源极/漏极区域可以从衬底外延生长，并且可以包括在未掺杂区域上方的掺杂区域，使得沟道长度从浮置栅极下方有效地延伸并且向上延伸到未掺杂区域，使得短沟道效应为减少侧壁绝缘层与底部绝缘层的厚度的比例可以为约0.3至0.67。

2. 发明申请

US20090261398A1 NON-VOLATILE MEMORY WITH SIDEWALL CHANNELS AND RAISED SOURCE/DRAIN REGIONS 有权
标题翻译：非易失性存储器，带有通道和扩展源/漏区
公开(公告)号：US20090261398A1
公开(公告)日：2009-10-22
申请号：US12105242
申请日：2008-04-17
申请人： Henry Chien , Takashi Orimoto , George Matamis , James Kai , Vinod R. Purayath
发明人： Henry Chien , Takashi Orimoto , George Matamis , James Kai , Vinod R. Purayath
IPC分类号： H01L29/788
CPC分类号： G11C8/10 , G11C8/04 , G11C11/5621 , G11C16/0483 , G11C19/00 , H01L21/28273 , H01L27/11521
摘要： A non-volatile storage system in which a sidewall insulating layer of a floating gate is significantly thinner than a thickness of a bottom insulating layer, and in which raised source/drain regions are provided. During programming or erasing, tunneling occurs predominantly via the sidewall insulating layer and the raised source/drain regions instead of via the bottom insulating layer. The floating gate may have a uniform width or an inverted T shape. The raised source/drain regions may be epitaxially grown from the substrate, and may include a doped region above an undoped region so that the channel length is effectively extended from beneath the floating gate and up into the undoped regions, so that short channel effects are reduced. The ratio of the thicknesses of the sidewall insulating layer to the bottom insulating layer may be about 0.3 to 0.67.
摘要翻译：一种非易失性存储系统，其中浮动栅极的侧壁绝缘层比底部绝缘层的厚度明显薄，并且其中设置有凸起的源极/漏极区域。在编程或擦除期间，隧道主要通过侧壁绝缘层和凸起的源极/漏极区域而不是通过底部绝缘层发生。浮动门可以具有均匀的宽度或倒T形。凸起的源极/漏极区域可以从衬底外延生长，并且可以包括在未掺杂区域上方的掺杂区域，使得沟道长度从浮置栅极下方有效地延伸并且向上延伸到未掺杂区域，使得短沟道效应为减少侧壁绝缘层与底部绝缘层的厚度的比例可以为约0.3至0.67。

3. 发明授权

US08030160B2 Methods of forming NAND flash memory with fixed charge 有权
标题翻译：用固定电荷形成NAND闪存的方法
公开(公告)号：US08030160B2
公开(公告)日：2011-10-04
申请号：US12729874
申请日：2010-03-23
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： H01L21/8247
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

4. 发明申请

US20080171406A1 Methods Of Forming Integrated Circuit Devices Using Composite Spacer Structures 有权
标题翻译：使用复合间隔结构形成集成电路器件的方法
公开(公告)号：US20080171406A1
公开(公告)日：2008-07-17
申请号：US12014689
申请日：2008-01-15
申请人： Takashi Orimoto , George Matamis , James Kai , Tuan Pham , Masaaki Higashitani , Henry Chien
发明人： Takashi Orimoto , George Matamis , James Kai , Tuan Pham , Masaaki Higashitani , Henry Chien
IPC分类号： H01L21/8247
CPC分类号： H01L27/115 , G11C16/0483 , H01L27/11521
摘要： Methods of fabricating integrated circuit devices are provided using composite spacer formation processes. A composite spacer structure is used to pattern and etch the layer stack when forming select features of the devices. A composite storage structure includes a first spacer formed from a first layer of spacer material and second and third spacers formed from a second layer of spacer material. The process is suitable for making devices with line and space sizes at less then the minimum resolvable feature size of the photolithographic processes being used. Moreover, equal line and space sizes at less than the minimum feature size. In one embodiment, an array of dual control gate non-volatile flash memory storage elements is formed using composite spacer structures. When forming the active areas of the substrate, with overlying strips of a layer stack and isolation regions therebetween, a composite spacer structure facilitates equal lengths of the strips and isolation regions therebetween.
摘要翻译：使用复合间隔物形成工艺提供制造集成电路器件的方法。当形成设备的选择特征时，使用复合间隔物结构来图案化和蚀刻层堆叠。复合存储结构包括由第一隔离物材料层形成的第一间隔物和由第二隔离物材料层形成的第二和第三间隔物。该方法适用于制造具有小于所使用的光刻工艺的最小可分辨特征尺寸的线和空间尺寸的装置。此外，等于线和空间大小小于最小特征尺寸。在一个实施例中，使用复合间隔结构形成双控制非易失性闪存存储元件阵列。当形成衬底的活性区域时，具有叠层的叠层和隔离区之间的复合间隔结构有利于条之间的等长长度和隔离区。

5. 发明申请

US20100178742A1 METHODS OF FORMING NAND FLASH MEMORY WITH FIXED CHARGE 有权
标题翻译：形成具有固定电荷的NAND闪存存储器的方法
公开(公告)号：US20100178742A1
公开(公告)日：2010-07-15
申请号：US12729874
申请日：2010-03-23
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： H01L21/336 , H01L21/28
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

6. 发明授权

US07619926B2 NAND flash memory with fixed charge 有权
标题翻译： NAND闪存固定充电
公开(公告)号：US07619926B2
公开(公告)日：2009-11-17
申请号：US11692958
申请日：2007-03-29
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： G11C11/34
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/42324 , H01L29/7881
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

7. 发明授权

US07494870B2 Methods of forming NAND memory with virtual channel 有权
标题翻译：用虚拟通道形成NAND存储器的方法
公开(公告)号：US07494870B2
公开(公告)日：2009-02-24
申请号：US11626784
申请日：2007-01-24
申请人： Henry Chien , George Matamis , Takashi Orimoto , James Kai
发明人： Henry Chien , George Matamis , Takashi Orimoto , James Kai
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A string of nonvolatile memory cells are connected together by source/drain regions that include an inversion layer created by fixed charge in an overlying layer. Control gates extend between floating gates so that two control gates couple to a floating gate. A fixed charge layer may be formed by plasma nitridation.
摘要翻译：一系列非易失性存储单元通过源/漏区连接在一起，其包括在上层中由固定电荷产生的反型层。控制栅极在浮动栅极之间延伸，使得两个控制栅极耦合到浮动栅极。可以通过等离子体氮化形成固定电荷层。

8. 发明授权

US07732275B2 Methods of forming NAND flash memory with fixed charge 有权
标题翻译：用固定电荷形成NAND闪存的方法
公开(公告)号：US07732275B2
公开(公告)日：2010-06-08
申请号：US11692961
申请日：2007-03-29
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： H01L21/8247
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

9. 发明申请

US20080242006A1 METHODS OF FORMING NAND FLASH MEMORY WITH FIXED CHARGE 有权
标题翻译：形成具有固定电荷的NAND闪存存储器的方法
公开(公告)号：US20080242006A1
公开(公告)日：2008-10-02
申请号：US11692961
申请日：2007-03-29
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： H01L21/77
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

10. 发明申请

US20080239819A1 NAND FLASH MEMORY WITH FIXED CHARGE 有权
标题翻译：具有固定充电的NAND闪存
公开(公告)号：US20080239819A1
公开(公告)日：2008-10-02
申请号：US11692958
申请日：2007-03-29
申请人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
发明人： Takashi Orimoto , George Matamis , Henry Chien , James Kai
IPC分类号： G11C11/34
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/42324 , H01L29/7881
摘要： A string of nonvolatile memory cells connected in series includes fixed charges located between floating gates and the underlying substrate surface. Such a fixed charge affects distribution of charge carriers in an underlying portion of the substrate and thus affects threshold voltage of a device. A fixed charge layer may extend over source/drain regions also.
摘要翻译：一串串联的非易失性存储单元包括位于浮置栅极和下面的衬底表面之间的固定电荷。这样的固定电荷会影响衬底的下层部分中电荷载流子的分布，从而影响器件的阈值电压。固定电荷层也可以在源极/漏极区域上延伸。

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