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1. 发明授权

US07615445B2 Methods of reducing coupling between floating gates in nonvolatile memory 有权
标题翻译：减少非易失性存储器中浮动栅极耦合的方法
公开(公告)号：US07615445B2
公开(公告)日：2009-11-10
申请号：US11534135
申请日：2006-09-21
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures. An array having inverted-T shaped floating gates may be formed in a self-aligned manner.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。具有倒T形浮置栅极的阵列可以以自对准的方式形成。

2. 发明申请

US20080074920A1 Nonvolatile Memory with Reduced Coupling Between Floating Gates 审中-公开
标题翻译：浮动闸门耦合减少的非易失性存储器
公开(公告)号：US20080074920A1
公开(公告)日：2008-03-27
申请号：US11534139
申请日：2006-09-21
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： G11C5/06
CPC分类号： H01L27/115 , H01L27/11521
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures. An array having inverted-T shaped floating gates may be formed in a self-aligned manner.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。具有倒T形浮置栅极的阵列可以以自对准的方式形成。

3. 发明申请

US20110111583A1 METHOD OF REDUCING COUPLING BETWEEN FLOATING GATES IN NONVOLATILE MEMORY 有权
标题翻译：降低非易失性存储器中浮动栅之间耦合的方法
公开(公告)号：US20110111583A1
公开(公告)日：2011-05-12
申请号：US13010563
申请日：2011-01-20
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。

4. 发明授权

US08288225B2 Method of reducing coupling between floating gates in nonvolatile memory 有权
标题翻译：减少非易失性存储器中浮动栅极耦合的方法
公开(公告)号：US08288225B2
公开(公告)日：2012-10-16
申请号：US13010563
申请日：2011-01-20
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。

5. 发明授权

US07910434B2 Method of reducing coupling between floating gates in nonvolatile memory 有权
标题翻译：减少非易失性存储器中浮动栅极耦合的方法
公开(公告)号：US07910434B2
公开(公告)日：2011-03-22
申请号：US12567257
申请日：2009-09-25
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。

6. 发明申请

US20080076217A1 Methods of Reducing Coupling Between Floating Gates in Nonvolatile Memory 有权
标题翻译：减少非易失性存储器中浮动栅极耦合的方法
公开(公告)号：US20080076217A1
公开(公告)日：2008-03-27
申请号：US11534135
申请日：2006-09-21
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures. An array having inverted-T shaped floating gates may be formed in a self-aligned manner.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。具有倒T形浮置栅极的阵列可以以自对准的方式形成。

7. 发明申请

US20100047979A1 METHOD OF REDUCING COUPLING BETWEEN FLOATING GATES IN NONVOLATILE MEMORY 有权
标题翻译：降低非易失性存储器中浮动栅之间耦合的方法
公开(公告)号：US20100047979A1
公开(公告)日：2010-02-25
申请号：US12567257
申请日：2009-09-25
申请人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
发明人： Henry Chien , George Matamis , Tuan Pham , Masaaki Higashitani , Hidetaka Horiuchi , Jeffrey W. Lutze , Nima Mokhlesi , Yupin Kawing Fong
IPC分类号： H01L21/336 , H01L21/76 , H01L21/3205
CPC分类号： H01L27/115 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.
摘要翻译：非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。相邻的串由浅沟槽隔离结构隔离。

8. 发明授权

US07734861B2 Pseudo random and command driven bit compensation for the cycling effects in flash memory 有权
标题翻译：伪随机和命令驱动位补偿闪存中的循环效应
公开(公告)号：US07734861B2
公开(公告)日：2010-06-08
申请号：US11530392
申请日：2006-09-08
申请人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
发明人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
IPC分类号： G06F13/10
CPC分类号： G11C16/3418 , G11C7/1006 , G11C11/5621 , G11C16/0483 , G11C16/3427
摘要： Easily implemented randomization within a flash memory EEPROM reduces the NAND string resistance effect, program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. The randomization may be code generated pseudo randomization or user driven randomization in different embodiments. User driven commands, the timing of which cannot be predicted may be used to trigger and achieve a high level of randomization. Randomly altering the encoding scheme of the data prevents repeated and long term storage of specific data patterns. Even if a user wishes to store the same information for long periods, or to repeatedly store it, it will be randomly encoded with different encoding schemes, and the data pattern will therefore be varied.
摘要翻译：易于实现的闪速存储器EEPROM内的随机化可以减少由于特定数据模式的重复和长期存储而导致的NAND串电阻效应，程序干扰，用户读取干扰以及浮动栅极与浮动栅极耦合。在不同的实施例中，随机化可以是代码生成的伪随机化或用户驱动的随机化。用户驱动的命令，其定时不能预测可用于触发和实现高水平的随机化。随机改变数据的编码方案可防止特定数据模式的重复和长期存储。即使用户希望长时间存储相同的信息，也可以重复存储，将以不同的编码方式进行随机编码，因此数据模式将会变化。

9. 发明授权

US07606966B2 Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory 有权
标题翻译：闪存中循环效应的伪随机和命令驱动位补偿方法
公开(公告)号：US07606966B2
公开(公告)日：2009-10-20
申请号：US11530399
申请日：2006-09-08
申请人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
发明人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
IPC分类号： G06F13/10
CPC分类号： G11C7/1006 , G11C16/3418
摘要： Easily implemented randomization within a flash memory EEPROM reduces the NAND string resistance effect, program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. The randomization may be code generated pseudo randomization or user driven randomization in different embodiments. User driven commands, the timing of which cannot be predicted may be used to trigger and achieve a high level of randomization. Randomly altering the encoding scheme of the data prevents repeated and long term storage of specific data patterns. Even if a user wishes to store the same information for long periods, or to repeatedly store it, it will be randomly encoded with different encoding schemes, and the data pattern will therefore be varied.
摘要翻译：易于实现的闪速存储器EEPROM内的随机化可以减少由于特定数据模式的重复和长期存储而导致的NAND串电阻效应，程序干扰，用户读取干扰以及浮动栅极与浮动栅极耦合。在不同的实施例中，随机化可以是代码生成的伪随机化或用户驱动的随机化。用户驱动的命令，其定时不能预测可用于触发和实现高水平的随机化。随机改变数据的编码方案可防止特定数据模式的重复和长期存储。即使用户希望长时间存储相同的信息，也可以重复存储，将以不同的编码方式进行随机编码，因此数据模式将会变化。

10. 发明申请

US20090067244A1 NONVOLATILE MEMORY AND METHOD FOR ON-CHIP PSEUDO-RANDOMIZATION OF DATA WITHIN A PAGE AND BETWEEN PAGES 有权
标题翻译：非页面存储器和方法，用于在页面和页面之间的数据的片上PSEUDO-RANDOMIZATION
公开(公告)号：US20090067244A1
公开(公告)日：2009-03-12
申请号：US11852229
申请日：2007-09-07
申请人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
发明人： Yan Li , Yupin Kawing Fong , Nima Mokhlesi
IPC分类号： G11C16/08
CPC分类号： G11C11/5628 , G11C7/1006 , G11C16/10 , G11C16/3418 , G11C16/3427 , G11C2211/5647
摘要： Features within an integrated-circuit memory chip enables scrambling or randomization of data stored in an array of nonvolatile memory cells. In one embodiment, randomization within each page helps to control source loading errors during sensing and floating gate to floating gate coupling among neighboring cells. Randomization from page to page helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. In another embodiment, randomization is implemented both within a page and between pages. The scrambling or randomization may be predetermined, or code generated pseudo randomization or user driven randomization in different embodiments. These features are accomplished within the limited resource and budget of the integrated-circuit memory chip.
摘要翻译：集成电路存储芯片内的特征使得能够对存储在非易失性存储单元阵列中的数据进行加扰或随机化。在一个实施例中，每个页面内的随机化有助于控制感测期间的源负载误差和在相邻小区之间的浮动栅极到浮动栅极耦合。从页面到页面的随机化有助于减少程序干扰，用户读取干扰以及由特定数据模式的重复和长期存储引起的浮动栅极耦合的浮动栅极。在另一个实施例中，在页面之间和页面之间实现随机化。在不同的实施例中，加扰或随机化可以是预定的，或代码生成的伪随机化或用户驱动的随机化。这些功能在集成电路存储芯片的有限资源和预算内完成。

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