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    • 4. 发明申请
    • Detector
    • 探测器
    • US20070103307A1
    • 2007-05-10
    • US11598195
    • 2006-11-13
    • John WatersWeng Wah LohFraser John Dickin
    • John WatersWeng Wah LohFraser John Dickin
    • G08B13/14G06F3/12
    • G06K7/10128G01S13/753G06K7/0008
    • A detector for detecting the presence of a memory tag, the detector comprising a radio frequency source operable to generate a radio frequency signal and a detector resonant circuit part connected to the radio frequency source, the detector resonant circuit part comprising an antenna, the detector further comprising a power monitor responsive to the power of a reflected signal returned from the detector resonant circuit part, the power monitor being operable to generate an output in response to the power of the reflected signal, wherein a decrease in the power of the reflected signal indicates the presence of a tag in the vicinity of the antenna.
    • 一种用于检测存储器标签的存在的检测器,所述检测器包括可操作以产生射频信号的射频源和连接到所述射频源的检测器谐振电路部分,所述检测器谐振电路部分包括天线,所述检测器进一步 包括响应于从检测器谐振电路部分返回的反射信号的功率的功率监视器,功率监视器可操作以响应于反射信号的功率产生输出,其中反射信号的功率的减小指示 在天线附近存在标签。
    • 6. 发明授权
    • Devices and methods for memory tag error correction
    • 记忆体标签纠错的装置和方法
    • US07555616B2
    • 2009-06-30
    • US10947171
    • 2004-09-23
    • John Deryk WatersWeng Wah LohFraser John Dickin
    • John Deryk WatersWeng Wah LohFraser John Dickin
    • G06F12/00G06F13/00G06F13/28H04Q5/22G08B13/14
    • G06K19/0723G06K7/0008
    • Embodiments relating to a memory tag having a resonant circuit part and a non-volatile memory is presented. The resonant circuit part can be made operable, in response to a reader signal received from a reader, to provide power to the memory, the tag being operable to read the memory and transmit data stored in the memory in response to the signal from the reader. The data is stored in the memory in a plurality of data units, with each data unit having an associated sequence number. The tag is operable to store the sequence number of the data unit to be transmitted in a register in the non-volatile memory. When power is supplied to the memory, the data units are transmitted in sequence, where the first data unit to be transmitted depends on the stored sequence number.
    • 提出了具有谐振电路部分和非易失性存储器的存储器标签的实施例。 谐振电路部分可以响应于从读取器接收到的读取器信号而可操作以向存储器提供电力,标签可操作以响应于来自读取器的信号读取存储器和发送存储在存储器中的数据 。 数据以多个数据单元存储在存储器中,每个数据单元具有相关联的序列号。 标签可操作以将要发送的数据单元的序列号存储在非易失性存储器中的寄存器中。 当向存储器供电时,依次发送数据单元,其中要发送的第一数据单元取决于存储的序列号。
    • 9. 发明授权
    • Bufferless writing of data to memory
    • 将数据缓冲区写入存储器
    • US07836382B2
    • 2010-11-16
    • US11294467
    • 2005-12-06
    • Fraser John DickinWeng Wah Loh
    • Fraser John DickinWeng Wah Loh
    • H03M13/00
    • G06F11/1004
    • This invention provides a processor for writing data contained in payload data of a data packet to memory. The processor may, in some embodiments, be a central processing unit of a memory tag. The processor does not include a write buffer. The processor may comprise a first register adapted to latch first data corresponding to a segment of the payload data; and a second register adapted to receive second data from the payload data to enable the validity of the data latched into the first register to be established before data is written to memory. A memory device, a method for writing data contained in payload data, a data packet, a method of writing data into a non-volatile memory and a memory tag may also be provided.
    • 本发明提供了一种用于将数据包的有效载荷数据中包含的数据写入存储器的处理器。 在一些实施例中,处理器可以是存储器标签的中央处理单元。 处理器不包括写入缓冲区。 处理器可以包括第一寄存器,其适于锁存对应于有效载荷数据的段的第一数据; 以及第二寄存器,其适于从所述有效载荷数据接收第二数据,以使得在将数据写入存储器之前,锁存到所述第一寄存器中的数据的有效性被建立。 还可以提供一种存储装置,一种用于将包含在有效载荷数据中的数据,数据包,将数据写入非易失性存储器和存储标签的方法。