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    • 1. 发明申请
    • Transmitter and receiver gain calibration by means of feedback in a transceiver
    • 发射机和接收机通过收发器中的反馈进行增益校准
    • US20070129031A1
    • 2007-06-07
    • US10521417
    • 2003-06-25
    • Anthony NewtonHeinz Lehning
    • Anthony NewtonHeinz Lehning
    • H01Q11/12H04B1/06H04B1/04
    • H04B1/40H04B17/14H04B17/20H04B17/24H04B17/318
    • The invention relates to gain calibration in a transceiver unit (100) having a transmitter unit and a receiver unit and a feed back coupling (165) between these. A signal level measurement unit (163) measures signal levels of a feedback signal through either the receiver unit or through a signal level detector (167). A reference signal level of the feedback signal is set by adjusting the transmitter until the signal level measurement unit (163) measures a predefined value when connected through the signal level detector (167). An absolute value of the transmitter gain is then calibrated. The signal level measurement unit (163) is connected through the receiver unit and the absolute gain of the receiver is calibrated. A gain is changed either in the receiver or the transmitter unit. The relative signal level change of the feedback signal is measured and used to calibrate the gain step.
    • 本发明涉及具有发射器单元和接收器单元的收发器单元(100)中的增益校准以及它们之间的反馈耦合器(165)。 信号电平测量单元(163)通过接收器单元或通过信号电平检测器(167)测量反馈信号的信号电平。 通过调整发射机来设置反馈信号的参考信号电平,直到信号电平测量单元(163)在通过信号电平检测器(167)连接时测量预定值时。 然后校准发射机增益的绝对值。 信号电平测量单元(163)通过接收器单元连接,接收器的绝对增益被校准。 在接收机或发射机单元中增益也会改变。 测量反馈信号的相对信号电平变化,并用于校准增益步长。
    • 2. 发明授权
    • High voltage amplifier
    • 高压放大器
    • US4697155A
    • 1987-09-29
    • US853799
    • 1986-04-17
    • Heinz Lehning
    • Heinz Lehning
    • H03F3/42H03F3/04
    • H03F3/426
    • An integrated high voltage amplifier output stage capable of being manufactured using low voltage processes comprises a plurality of low-voltage amplifying means (8-21), such as a chain of Darlington transistor pairs, connected between a relatively high voltage source (36) and a current source (34) to provide a common output (35). A potential divider network (1-7) is connected between the high voltage source (36) and a protective high voltage FET (30) for providing low voltage inputs to each of the amplifying means. The input signal to the potential divider network (1-7) is then provided from a cascode stage made up of a low voltage transistor (29) and the high voltage FET (30), all the components being produced by a low voltage process.
    • 能够使用低电压工艺制造的集成高压放大器输出级包括多个低电压放大装置(8-21),例如达林顿晶体管对链,其连接在相对高电压源(36)和 用于提供公共输出(35)的电流源(34)。 分压网络(1-7)连接在高压源(36)和保护高压FET(30)之间,用于向每个放大装置提供低电压输入。 然后,从由低压晶体管(29)和高电压FET(30)构成的共源共栅级提供到分压器网络(1-7)的输入信号,所有的部件都是由低电压工艺产生的。
    • 3. 发明授权
    • Current hogging logic circuit with npn vertical reversal transistor and
diode/pnp vertical transistor output
    • 具有npn垂直反向晶体管和二极管/​​ pnp垂直晶体管输出的当前ho逻逻辑电路
    • US4328509A
    • 1982-05-04
    • US94119
    • 1979-11-14
    • Heinz Lehning
    • Heinz Lehning
    • H01L21/8224H01L21/331H01L27/082H01L29/73H01L29/735H03K19/088H03K19/091H03K23/00H01L29/72
    • H03K19/091H01L29/735H03K23/002
    • In an n-type base island are provided a p-type emitter stripe and a p-type output collector stripe, with one or more intermediate control collector stripes for switching the current of the output collector. The pattern of control collector stripes can provide AND functions, OR functions or combinations thereof in a single logic element in a single base island. Each output is provided with an npn current reversal transistor in a separate island and if more than one input is to be operated by the output of a logic element, decoupling and fan-out capability are provided by vertical pnp transistors driven by the inverter transistors, which do not require an island completely separate from the inverter transistor, although an isolating barrier stripe can be helpful. A bistable flipflop and a frequency divider cell are shown to illustrate the use of these logic structures. The decoupling referred to can be provided without fan-out amplification by means of diodes.
    • 在n型基岛中设置有p型发射极条和p型输出集电极条,具有用于切换输出集电极的电流的一个或多个中间控制集电极条。 控制收集器条纹的图案可以在单个基本岛中的单个逻辑元件中提供AND功能,OR函数或其组合。 每个输出端在单独的岛中设置有npn电流反向晶体管,如果多个输入由逻辑元件的输出端操作,则由反相晶体管驱动的垂直pnp晶体管提供去耦和扇出能力, 其不需要与逆变器晶体管完全分离的岛,尽管隔离屏障条可以是有帮助的。 双稳态触发器和分频器单元被示出来说明这些逻辑结构的使用。 可以通过二极管不提供扇出放大来提供所谓的去耦。
    • 4. 发明授权
    • High voltage operational amplifier
    • 高压运算放大器
    • US5745008A
    • 1998-04-28
    • US662541
    • 1996-06-13
    • Thien Huynh LuongHeinz Lehning
    • Thien Huynh LuongHeinz Lehning
    • G06G7/12H03F3/20H03F3/30H03F3/343H03F3/42H03F3/45H03F1/14
    • H03F3/3001H03F3/423
    • A high voltage operational amplifier receives a low voltage differential input signal at a low voltage transconductance stage (3) which provides a differential current output. An intermediate stage (5) has a differential current input coupled to the differential current output of the transconductance stage (3) via a voltage buffer stage (4) and produces a voltage output at a high voltage level but with low voltage swings providing a voltage representing the differential input signal. An interface stage (9) is coupled to receive the voltage output of the intermediate stage (5) and provides voltage and current outputs representing the voltage output of the intermediate stage (5). Output sourcing and sinking stages (6 and 7) receive the voltage and current outputs of the interface stage (9), respectively, and produce high currents representative of the differential input signal. The combination of the high current outputs of the output sourcing and sinking stages (6 and 7) produces a high voltage output signal at the output terminal (8).
    • 高压运算放大器在低电压跨导级(3)处接收低电压差分输入信号,提供差分电流输出。 中间级(5)具有通过电压缓冲级(4)耦合到跨导级(3)的差分电流输出的差分电流输入,并产生高电压电平的电压输出,但是提供低电压摆幅,提供电压 代表差分输入信号。 接口级(9)被耦合以接收中间级(5)的电压输出,并且提供表示中间级(5)的电压输出的电压和电流输出。 输出采样和吸收级(6和7)分别接收接口级(9)的电压和电流输出,并产生代表差分输入信号的高电流。 输出源极和漏极级(6和7)的高电流输出的组合在输出端(8)处产生高电压输出信号。
    • 5. 发明授权
    • Discriminator device
    • 鉴别器
    • US5336947A
    • 1994-08-09
    • US15375
    • 1993-02-09
    • Heinz Lehning
    • Heinz Lehning
    • H04L29/08G01R19/165H03K5/19H03K5/153
    • H03K5/19G01R19/16566
    • A discriminator device for discriminating between two types of signal applied to an input port (EN), the first type being a binary logic signal having high and low values, and the second type of signal being a continuously variable signal or a floating voltage, the device including a voltage divider network (R1,R2) for coupling to the input port and a voltage supply (VCC) in order to provide a format signal, a second voltage divider network (R3,R4,R5) providing first and second voltage reference signals (VR1,VR2) having values intermediate the high and low values of the binary logic signal, comparators (34A, 34B) coupled to receive the format signal and the voltage reference signals, the outputs of the comparators being coupled to an output logic circuit (36-39) which provides a logic output signal of a value depending on the type of signal present at the input port.
    • 一种用于鉴别施加到输入端口(EN)的两种类型的信号的鉴别器装置,第一类型是具有高和低值的二进制逻辑信号,第二类型的信号是连续可变信号或浮动电压, 装置,包括用于耦合到输入端口的分压网络(R1,R2)和用于提供格式信号的电压源(VCC);提供第一和第二参考电压的第二分压网络(R3,R4,R5) 信号(VR1,VR2)具有中间二进制逻辑信号的高和低值,比较器(34A,34B)耦合以接收格式信号和电压参考信号,比较器的输出耦合到输出逻辑电路 (36-39),其根据存在于输入端口处的信号的类型提供值的逻辑输出信号。
    • 6. 发明授权
    • Fixed frequency voltage regulator
    • 固定频率稳压器
    • US4388587A
    • 1983-06-14
    • US331869
    • 1981-12-17
    • Mihaly LamothHeinz Lehning
    • Mihaly LamothHeinz Lehning
    • H02J7/16H02J7/24H02P9/14G05F1/56
    • H02J7/245H02J7/16H02P9/14Y02T10/92
    • A fixed frequency, variable duty cycle voltage regulator having a precision reference voltage source is provided. The reference voltage source has a variable temperature coefficient. The output of the precision reference voltage source is combined by a digitally switched attenuator to provide a staircase waveform to a comparator. This variable staircase waveform is compared against the output of an alternator. The comparator sets the output of a flip-flop to an off state when the staircase waveform goes below the output from the alternator. This removes the drive from a current switch which switches off the current flow through the field coil of the alternator.
    • 提供具有精密基准电压源的固定频率可变占空比电压调节器。 参考电压源具有可变的温度系数。 精密参考电压源的输出由数字切换衰减器组合,以向比较器提供阶梯波形。 将该可变阶梯波形与交流发电机的输出进行比较。 当阶梯波形低于交流发电机的输出时,比较器将触发器的输出设置为关闭状态。 这将驱动器从电流开关中消除,该电流开关切断通过交流发电机的励磁线圈的电流。
    • 7. 发明授权
    • Transmitter and receiver gain calibration by means of feedback in a transceiver
    • 发射机和接收机通过收发器中的反馈进行增益校准
    • US07567788B2
    • 2009-07-28
    • US10521417
    • 2003-06-25
    • Anthony NewtonHeinz Lehning
    • Anthony NewtonHeinz Lehning
    • H04B17/00H04B1/40
    • H04B1/40H04B17/14H04B17/20H04B17/24H04B17/318
    • The invention relates to gain calibration in a transceiver unit (100) having a transmitter unit and a receiver unit and a feed back coupling (165) between these. A signal level measurement unit (163) measures signal levels of a feedback signal through either the receiver unit or through a signal level detector (167). A reference signal level of the feedback signal is set by adjusting the transmitter until the signal level measurement unit (163) measures a predefined value when connected through the signal level detector (167). An absolute value of the transmitter gain is then calibrated. The signal level measurement unit (163) is connected through the receiver unit and the absolute gain of the receiver is calibrated. A gain is changed either in the receiver or the transmitter unit. The relative signal level change of the feedback signal is measured and used to calibrate the gain step.
    • 本发明涉及具有发射器单元和接收器单元的收发器单元(100)中的增益校准以及它们之间的反馈耦合器(165)。 信号电平测量单元(163)通过接收器单元或通过信号电平检测器(167)测量反馈信号的信号电平。 通过调整发射机来设置反馈信号的参考信号电平,直到信号电平测量单元(163)在通过信号电平检测器(167)连接时测量预定值时。 然后校准发射机增益的绝对值。 信号电平测量单元(163)通过接收器单元连接,接收器的绝对增益被校准。 在接收机或发射机单元中增益也会改变。 测量反馈信号的相对信号电平变化,并用于校准增益步长。
    • 8. 发明申请
    • Compensation of mismatch between quadrature paths
    • 补偿正交路径之间的失配
    • US20050107059A1
    • 2005-05-19
    • US10482088
    • 2002-06-17
    • Heinz LehningAnil GercekciSebastien Simoens
    • Heinz LehningAnil GercekciSebastien Simoens
    • H04L27/00H04B1/00H04B1/10H04B15/00
    • H04L27/0014H04L27/00H04L2027/0016
    • An apparatus for improving signal mismatch compensation between first and second RF signals comprises: at least one switch which applies a first RF signal, present on a first pathway, and a second RF signal, present on a second pathway, to respective first and second frequency mixers, during a first time period; the mixers provide a first pair of mixed first and second RF signals. Means for reversing the at least one switch, during a subsequent time period is provided so that the first RF signal is applied to the second mixer, via the second pathway, and the second RF signal is applied to the first mixer, via the first pathway. The mixers thereby provide a second pair of mixed first and second RF signals. Monitoring monitors respective first and second pairs of mixed RF signals during an interval. The monitoring means provides time averaged values for the first and second signals in each of said first and second pairs of RF signals, so that effects of signal mismatch on the first and second RF signals are minimised in each channel, by subjecting said RF signals in each channel, for substantially the same time, to the same pathways.
    • 一种用于改善第一和第二RF信号之间的信号失配补偿的装置包括:至少一个开关,其将存在于第二路径上的第一RF信号和存在于第二路径上的第二RF信号施加到相应的第一和第二频率 混合器,在第一时期; 混合器提供第一对混合的第一和第二RF信号。 提供了用于在随后的时间段期间使所述至少一个开关反转的装置,使得所述第一RF信号经由所述第二路径被施加到所述第二混频器,并且所述第二RF信号经由所述第一路径被施加到所述第一混频器 。 混合器由此提供第二对混合的第一和第二RF信号。 监视在间隔期间监视相应的第一和第二对混合RF信号。 所述监测装置提供所述第一和第二对RF信号中的每一个中的第一和第二信号的时间平均值,使得在每个信道中的信号失配对第一和第二RF信号的影响最小化, 每个通道,基本上相同的时间,到相同的途径。
    • 9. 发明授权
    • Transition detector circuit
    • 过渡检测电路
    • US4524291A
    • 1985-06-18
    • US456064
    • 1983-01-06
    • Heinz Lehning
    • Heinz Lehning
    • H03K5/1532H03K5/08H03K5/1254H03K5/1534H03K5/153
    • H03K5/08H03K5/1534
    • A noise-tolerant transition detector circuit (2) for detecting when an input signal rises above a first value (V2) and falls below a second value (V1) comprising: comparator means (12, 14) which produces a first output signal when the input signal rises above the first value and a second output signal when the input signal falls below the second value; and bistable means (20) which is set to its first stable state in response to the comparator means first output signal and which is set to its second stable state in response to the comparator means second output signal.Noise may be further reduced by using further bistable means (26) and pulse-forming means (28, 30) may also be employed.
    • 一种用于检测输入信号何时上升到高于第一值(V2)并且低于第二值(V1)的噪声容限转变检测器电路(2),包括:比较器装置(12,14),当第 当所述输入信号低于所述第二值时,所述输入信号上升到高于所述第一值和第二输出信号; 并且响应于比较器而被设置为其第一稳定状态的双稳态装置(20)意味着第一输出信号并且响应于比较器装置将其设置为其第二稳定状态第二输出信号。 可以通过使用进一步的双稳态装置(26)进一步降低噪声,并且还可以采用脉冲形成装置(28,30)。