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1. 发明授权

US08261130B2 Program code trace signature 有权
标题翻译：程序代码跟踪签名
公开(公告)号：US08261130B2
公开(公告)日：2012-09-04
申请号：US11681472
申请日：2007-03-02
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F11/00
CPC分类号： G06F11/28 , G06F11/3648
摘要： A processor generates a signature value indicating a sequence of executed instructions, and the signature value is compared to signature values calculated for two or more possible sequences of executed instructions to determine which instruction sequence was executed. The signature is generated via a signature generator during program execution, and is provided external to the processor via a signature message.
摘要翻译：处理器产生指示执行指令序列的签名值，并且将签名值与针对两个或多个可能的执行指令序列计算的签名值进行比较，以确定执行哪个指令序列。签名在程序执行期间通过签名生成器生成，并且经由签名消息在处理器外部提供。

2. 发明申请

US20080040636A1 INTEGRATED CIRCUIT HAVING A SUBORDINATE TEST INTERFACE 有权
标题翻译：具有次级测试界面的集成电路
公开(公告)号：US20080040636A1
公开(公告)日：2008-02-14
申请号：US11696838
申请日：2007-04-05
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G01R31/28
CPC分类号： G01R31/31907 , G06F11/267 , G06F11/3656
摘要： An integrated circuit having a subordinate test interface and method for transmitting digital data is disclosed. The integrated circuit includes at least one test interface that is adapted to write and read data in and from a data memory, the at least one test interface includes, for transmitting and receiving data of different content categories, one signal line each for every content category. The integrated circuit further includes an interface module for receiving and transmitting data, and that the interface module is, via the signal lines, connected with the test interface for transmitting the data of the different content categories.
摘要翻译：公开了一种具有用于发送数字数据的从属测试接口和方法的集成电路。该集成电路包括适于在数据存储器中写入数据和从数据存储器读取数据的至少一个测试接口，所述至少一个测试接口包括用于发送和接收不同内容类别的数据的每个内容类别的每个信号线。集成电路还包括用于接收和发送数据的接口模块，并且接口模块经由信号线与用于发送不同内容类别的数据的测试接口连接。

3. 发明申请

US20090222254A1 SYSTEM AND METHOD FOR INTEGRATED CIRCUIT EMULATION 有权
标题翻译：用于集成电路仿真的系统和方法
公开(公告)号：US20090222254A1
公开(公告)日：2009-09-03
申请号：US12039258
申请日：2008-02-28
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F11/261
摘要： A system and method for integrated circuit emulation. One embodiment provides a system for in-circuit emulation of an integrated circuit device with program-controlled components. The system includes an integrated circuit device with program-controlled components used in a system for normal operation. The integrated circuit device having at least one program-controlled emulation unit emulating at least one of the program-controlled components of the integrated circuit device, and at least one statistics memory for storing statistical data of the program-controlled emulation unit during emulation.
摘要翻译：一种用于集成电路仿真的系统和方法。一个实施例提供了一种用于在线仿真具有程序控制部件的集成电路器件的系统。该系统包括具有用于正常操作的系统中使用的程序控制部件的集成电路装置。所述集成电路装置具有模拟所述集成电路装置的程序控制部件中的至少一个的至少一个程序控制的仿真部，以及至少一个用于在仿真期间存储所述程序控制的仿真部的统计数据的统计存储器。

4. 发明申请

US20090187747A1 SYSTEM AND METHOD FOR TRACING INSTRUCTION POINTERS AND DATA ACCESS 审中-公开
标题翻译：跟踪指令和数据访问的系统和方法
公开(公告)号：US20090187747A1
公开(公告)日：2009-07-23
申请号：US12016347
申请日：2008-01-18
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F9/44
CPC分类号： G06F11/3636
摘要： A system and method for tracing instruction pointers and data access is disclosed. In one embodiment the system includes a plurality of trace units including at least one first trace unit configured to perform an instruction pointer trace, and at least one second trace unit configured to perform a data trace. A multiplexer is connected between the plurality of processor cores and the plurality of trace units.
摘要翻译：公开了一种用于跟踪指令指针和数据访问的系统和方法。在一个实施例中，系统包括多个跟踪单元，其包括被配置为执行指令指针跟踪的至少一个第一跟踪单元和被配置为执行数据跟踪的至少一个第二跟踪单元。多路复用器连接在多个处理器核心和多个跟踪单元之间。

5. 发明授权

US07418631B2 Program-controlled unit 有权
标题翻译：程控单位
公开(公告)号：US07418631B2
公开(公告)日：2008-08-26
申请号：US10217223
申请日：2002-08-12
申请人： Harry Siebert , Albrecht Mayer
发明人： Harry Siebert , Albrecht Mayer
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3648
摘要： A program-controlled unit has debug resources for monitoring the operations proceeding within the program-controlled unit. The program-controlled unit described is distinguished by the fact that the debug resources contain a CPU, and/or that a portion of the debug resources is provided for monitoring the operations proceeding within the remainder of the debug resources. Debug resources constructed in this way make it possible for errors occurring in program-controlled units to be localized and eliminated rapidly and simply under all circumstances.
摘要翻译：程序控制单元具有用于监视在程序控制单元内进行的操作的调试资源。描述的程序控制单元的特征在于调试资源包含CPU，和/或提供调试资源的一部分用于监视在剩余调试资源内进行的操作。以这种方式构建的调试资源使得在程序控制单元中发生的错误可以在任何情况下快速简单地进行本地化和消除。

6. 发明授权

US08868982B2 Compact function trace based on execution length of leaf functions 有权
标题翻译：基于叶功能执行长度的紧凑型功能跟踪
公开(公告)号：US08868982B2
公开(公告)日：2014-10-21
申请号：US13352431
申请日：2012-01-18
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F11/00
CPC分类号： G06F11/3636
摘要： In accordance with one aspect of the invention, a system for generating compact function trace data for leaf functions includes a central processing unit (CPU), configured to output program flow information needed for generating a program flow trace, and a trace unit, coupled to the CPU. The trace unit is configured to receive the program flow information from the CPU for generating compact function trace data. The trace unit further comprises a first output mode and a second output mode and is further configured to select either the first output mode or the second output mode for generating compact function trace data.
摘要翻译：根据本发明的一个方面，一种用于生成用于叶片功能的紧凑功能跟踪数据的系统包括：中央处理单元（CPU），被配置为输出生成程序流迹线所需的程序流信息，以及跟踪单元， CPU。跟踪单元被配置为从CPU接收用于生成紧凑的功能跟踪数据的程序流信息。跟踪单元还包括第一输出模式和第二输出模式，并且还被配置为选择第一输出模式或第二输出模式以产生紧凑的功能跟踪数据。

7. 发明授权

US08825922B2 Arrangement for processing trace data information, integrated circuits and a method for processing trace data information 有权
标题翻译：处理跟踪数据信息的布置，集成电路和处理跟踪数据信息的方法
公开(公告)号：US08825922B2
公开(公告)日：2014-09-02
申请号：US13088498
申请日：2011-04-18
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F13/28 , G06F11/00 , G06F11/34 , G06F11/36
CPC分类号： G06F11/3466 , G06F11/3476 , G06F11/3636 , G06F11/3656 , G06F13/28
摘要： An arrangement for processing trace data information is provided, the arrangement including, a chip including one or more memory circuits configured to store trace data information relating to a series of instructions, and a trace data information port configured to provide off-chip access to the trace data information; and a direct memory access controller circuit configured to control the transportation of trace data information from the one or more memory circuits to the trace data information port.
摘要翻译：提供了一种用于处理跟踪数据信息的装置，该装置包括：包括被配置为存储与一系列指令相关的跟踪数据信息的一个或多个存储器电路的芯片以及被配置为提供片外访问的跟踪数据信息端口跟踪数据信息; 以及直接存储器访问控制器电路，被配置为控制将跟踪数据信息从一个或多个存储器电路传送到跟踪数据信息端口。

8. 发明申请

US20130185601A1 Compact Function Trace 有权
标题翻译：紧凑型功能跟踪
公开(公告)号：US20130185601A1
公开(公告)日：2013-07-18
申请号：US13352431
申请日：2012-01-18
申请人： Albrecht Mayer , Harry Siebert
发明人： Albrecht Mayer , Harry Siebert
IPC分类号： G06F11/34
CPC分类号： G06F11/3636
摘要： In accordance with one aspect of the invention, a system for generating compact function trace data for leaf functions includes a central processing unit (CPU), configured to output program flow information needed for generating a program flow trace, and a trace unit, coupled to the CPU. The trace unit is configured to receive the program flow information from the CPU for generating compact function trace data. The trace unit further comprises a first output mode and a second output mode and is further configured to select either the first output mode or the second output mode for generating compact function trace data.
摘要翻译：根据本发明的一个方面，一种用于生成用于叶片功能的紧凑功能跟踪数据的系统包括：中央处理单元（CPU），被配置为输出生成程序流迹线所需的程序流信息，以及跟踪单元， CPU。跟踪单元被配置为从CPU接收用于生成紧凑的功能跟踪数据的程序流信息。跟踪单元还包括第一输出模式和第二输出模式，并且还被配置为选择第一输出模式或第二输出模式以产生紧凑的功能跟踪数据。

9. 发明授权

US07743295B2 System and method for testing an integrated circuit 有权
标题翻译：用于测试集成电路的系统和方法
公开(公告)号：US07743295B2
公开(公告)日：2010-06-22
申请号：US11686015
申请日：2007-03-14
申请人： Albrecht Mayer , Klaus Scheibert , Harry Siebert
发明人： Albrecht Mayer , Klaus Scheibert , Harry Siebert
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G11C29/56 , G11C29/48 , G11C2029/0401
摘要： A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface, wherein the volatile memory area is connected to the interface to be written thereto by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.
摘要翻译：公开了一种用于测试集成电路的系统和方法。一个实施例包括至少一个中央处理单元，至少一个易失性存储器区域和接口，其中易失性存储器区域连接到接口以由接口写入。该系统包括与集成电路连接的测试装置，其被配置为停止程序执行，通过使用接口将数据写入易失性存储器，并开始执行程序。

10. 发明申请

US20070220336A1 SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT 有权
标题翻译：用于测试集成电路的系统和方法
公开(公告)号：US20070220336A1
公开(公告)日：2007-09-20
申请号：US11686015
申请日：2007-03-14
申请人： Albrecht Mayer , Klaus Scheibert , Harry Siebert
发明人： Albrecht Mayer , Klaus Scheibert , Harry Siebert
IPC分类号： G06F11/00
CPC分类号： G11C29/56 , G11C29/48 , G11C2029/0401
摘要： A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface is suggested, wherein the memory area is adapted to be written by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.
摘要翻译：公开了一种用于测试集成电路的系统和方法。一个实施例包括至少一个中央处理单元，至少一个易失性存储器区域和接口，其中该存储器区域适于由该接口写入。该系统包括与集成电路连接的测试装置，其被配置为停止程序执行，通过使用接口将数据写入易失性存储器，并开始执行程序。

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