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    • 5. 发明申请
    • NON-VOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION
    • 非易失性存储器件及其相关操作方法
    • US20120331210A1
    • 2012-12-27
    • US13526794
    • 2012-06-19
    • JAEYONG JEONGJU SEOK LEE
    • JAEYONG JEONGJU SEOK LEE
    • G06F12/02
    • G11C16/26G11C11/5642G11C16/24G11C16/3454
    • A nonvolatile memory device comprises a cell array connected to a plurality of bit lines in an all bit line structure, a page buffer circuit connected to the plurality of bit lines, and control logic configured to control the page buffer circuit. The control logic controls the page buffer circuit to sense memory cells corresponding to both even-numbered and odd-numbered columns of a selected page in a first read mode and to sense memory cells corresponding to one of the even-numbered and odd-numbered columns of the selected page in a second read mode. A sensing operation is performed at least twice in the first read mode and once in the second read mode.
    • 非易失性存储器件包括连接到全位线结构中的多个位线的单元阵列,连接到多个位线的寻址缓冲器电路以及被配置为控制页缓冲器电路的控制逻辑。 控制逻辑控制页面缓冲电路以在第一读取模式中感测与选定页面的偶数和偶数列对应的存储器单元,并且读取对应于偶数和奇数列之一的存储器单元 的第二读取模式。 在第一读取模式下执行感测操作至少两次,并且在第二读取模式中执行一次感测操作。
    • 6. 发明申请
    • NONVOLATILE MEMORY AND METHOD OF CONTROLLING THEREOF
    • 非易失存储器及其控制方法
    • US20130021852A1
    • 2013-01-24
    • US13552668
    • 2012-07-19
    • JAEYONG JEONG
    • JAEYONG JEONG
    • G11C7/10
    • G11C16/28G11C16/0483G11C16/20
    • A memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes a memory cell array storing setup data and reference data, and first and second latch units respectively configured to store the setup data and the reference data sensed from the memory cell array upon a power-up of the memory system. The controller is configured to control a sensing operation of the nonvolatile memory. An operating environment of the nonvolatile memory is determined by the setup data stored in the first latch unit, and the controller controls the nonvolatile memory to re-store the setup data of the memory cell array in the first latch unit when the reference data of the second latch unit is changed.
    • 存储器系统包括非易失性存储器和控制器。 非易失性存储器包括存储设置数据和参考数据的存储单元阵列,以及第一和第二锁存单元,分别被配置为在存储器系统的加电时存储从存储单元阵列感测的建立数据和参考数据。 控制器被配置为控制非易失性存储器的感测操作。 非易失性存储器的操作环境由存储在第一锁存单元中的设置数据确定,并且当第一锁存单元的参考数据为“0”时,控制器控制该非易失性存储器以将存储单元阵列的建立数据重新存储在第一锁存单元中 第二锁存单元被改变。