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1. 发明申请

US20120273254A1 SOLDERING PAD 有权
标题翻译：焊接垫
公开(公告)号：US20120273254A1
公开(公告)日：2012-11-01
申请号：US13217626
申请日：2011-08-25
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H01B5/00
CPC分类号： H05K1/111 , H05K1/0242 , H05K1/025 , H05K2201/09736 , Y02P70/611
摘要： A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.
摘要翻译：垫包括第一配合部分和第二配合部分。第一配合部分包括第一水平面和第一倾斜平面。第二配合部分包括第二水平面和第二倾斜平面。第一配合部分是能够连接到电线的铜箔。第二配合部分由绝缘材料制成。第一倾斜平面和第二倾斜平面结合在一起。

2. 发明申请

US20120241201A1 CIRCUIT BOARD 审中-公开
标题翻译：电路板
公开(公告)号：US20120241201A1
公开(公告)日：2012-09-27
申请号：US13107950
申请日：2011-05-15
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H05K1/09
CPC分类号： H05K1/025 , H05K1/024 , H05K1/0245 , H05K2201/09727
摘要： A circuit board includes a substrate and a copper layer positioned on the substrate. The copper layer includes a BGA area and a non-BGA area, and includes traces. The widths of the traces in the BGA area are smaller than the widths of the traces in the non-BGA area, the dielectric coefficient of the substrate in the BGA area is greater than the dielectric coefficient of the substrate in the non-BGA area for keeping the impedance of the traces consistent in the BGA area and in the non-BGA area.
摘要翻译：电路板包括基板和位于基板上的铜层。铜层包括BGA区域和非BGA区域，并且包括痕迹。 BGA区域中的迹线的宽度小于非BGA区域中的迹线的宽度，BGA区域中的衬底的介电系数大于非BGA区域中衬底的介电系数，保持BGA区域和非BGA区域的轨迹阻抗一致。

3. 发明申请

US20110094783A1 PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板
公开(公告)号：US20110094783A1
公开(公告)日：2011-04-28
申请号：US12647396
申请日：2009-12-25
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H05K1/16
CPC分类号： H05K1/0253 , H05K1/181 , H05K2201/09381 , H05K2201/0969 , H05K2201/10015 , H05K2201/10022 , H05K2201/10636 , Y02P70/611
摘要： A printed circuit board (PCB) includes a signal plane and a reference plane. The signal plane includes a pad, a passive element mounted on the pad, and a signal transmission line electrically connected to the passive element via the pad. The reference plane provides a return path for a signal transmitted through the passive element and the transmission line. A void is defined in the reference plane corresponding to the passive element, to increase a length of the return path.
摘要翻译：印刷电路板（PCB）包括信号平面和参考平面。信号平面包括焊盘，安装在焊盘上的无源元件以及通过焊盘与无源元件电连接的信号传输线。参考平面为通过无源元件和传输线传输的信号提供返回路径。在对应于无源元件的参考平面中定义空隙，以增加返回路径的长度。

4. 发明申请

US20130048352A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20130048352A1
公开(公告)日：2013-02-28
申请号：US13335996
申请日：2011-12-23
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H05K1/09
CPC分类号： H05K1/0253
摘要： A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line.
摘要翻译：印刷电路板包括信号层和参考层。信号层被铜箔覆盖。在信号层上设置多个负载的电路拓扑。电路拓扑包括驱动端子，第一信号接收端子和第二信号接收端子。驱动端子通过第一传输线连接到节点。节点分别通过第二和第三传输线连接到第一和第二信号接收终端。第二和第三传输线的长度之差大于来自驱动终端的信号的传输速度和上升时间的乘积。参考层用铜箔覆盖，并布置在信号层下面。在第二传输线下方，在参考层上形成没有铜箔的区域。

5. 发明申请

US20110094782A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20110094782A1
公开(公告)日：2011-04-28
申请号：US12647395
申请日：2009-12-25
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H05K1/16
CPC分类号： H05K1/0253 , H05K1/181 , H05K2201/09381 , H05K2201/0969 , H05K2201/10015 , H05K2201/10022 , H05K2201/10636 , Y02P70/611
摘要： A printed circuit board includes a signal plane and a reference plane. The signal plane includes a pad, a passive element mounted on the pad, and a signal transmission line electrically connected to the passive element via the pad. The reference plane provides a return path for a signal transmitted through the passive element and the signal transmission line. A void is defined in the reference plane corresponding to the passive element, to increase a length of the return path. A length of a first axis, perpendicular to the signal transmission line, of the void satisfies a following equation: W 1 ≈ 8  Wpad + 10  T 0.8  Wtrace + T , wherein Wpad is a width of the pad, Wtrace is a width of the transmission line, T is the height of the pad.
摘要翻译：印刷电路板包括信号平面和参考平面。信号平面包括焊盘，安装在焊盘上的无源元件以及通过焊盘与无源元件电连接的信号传输线。参考平面为通过无源元件和信号传输线传输的信号提供返回路径。在对应于无源元件的参考平面中定义空隙，以增加返回路径的长度。垂直于信号传输线的第一轴的长度满足以下等式：W 1≈8 Wpad + 10 T T W W W T T T + T，其中W pad是焊盘的宽度，Wtrace是传输线的宽度，T是焊盘的高度。

6. 发明申请

US20130049461A1 CIRCUIT TOPOLOGY OF PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板电路拓扑
公开(公告)号：US20130049461A1
公开(公告)日：2013-02-28
申请号：US13336000
申请日：2011-12-23
申请人： SHI-PIAO LUO , HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： SHI-PIAO LUO , HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H02J4/00
CPC分类号： H05K1/0248 , H03K5/1534 , H03K19/00346 , H04L25/0278 , H05K1/0231 , H05K1/0246 , H05K2201/10015 , Y10T307/25
摘要： A circuit topology for multiple loads includes a driving terminal, first and second signal receiving terminals, and a capacitor. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals through second and third transmission lines. The second transmission line is longer than the third transmission line, and a difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. A first terminal of the capacitor is connected to the third transmission line. A second terminal of the capacitor is grounded. A distance between the capacitor and the second signal receiving terminal is less than a distance between the capacitor and the node.
摘要翻译：用于多个负载的电路拓扑包括驱动端子，第一和第二信号接收端子以及电容器。驱动终端通过第一传输线连接到节点。节点通过第二和第三传输线连接到第一和第二信号接收终端。第二传输线比第三传输线长，并且第二传输线和第三传输线的长度之间的差大于来自驱动终端的信号的传输速度和上升时间的乘积。电容器的第一端子连接到第三传输线。电容器的第二个端子接地。电容器和第二信号接收端子之间的距离小于电容器和节点之间的距离。

7. 发明申请

US20120007688A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20120007688A1
公开(公告)日：2012-01-12
申请号：US12960321
申请日：2010-12-03
申请人： HUA-LI ZHOU , MING WEI , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , MING WEI , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H01P3/08
CPC分类号： H05K1/0245 , H05K2201/09727
摘要： A printed circuit board includes an insulation layer and a signal layer attached to the insulation layer. The signal layer includes a pair of differential transmission lines. Width W of each of the differential transmission lines is changed according to change of space S between the differential transmission lines, based on the following formula: W = C   1 × H × ( C   2 × H 0.8  W 0 + T ) C   3 ×  C   4 × S 0 H - 1 1 - C   3 ×  C   4 × S H - 1.25  T In above formula, C1=7.475, C2=5.98, C3=0.48, C4=−0.96, H is a thickness of the insulation layer, W0 is an original width of each of the differential transmission lines, and S0 is an original space between the differential transmission lines, and T is a thickness of each of the differential transmission lines.
摘要翻译：印刷电路板包括绝缘层和附着到绝缘层的信号层。信号层包括一对差动传输线。差分传输线的宽度W根据以下公式根据差分传输线之间的空间S的变化而改变：W = C 1 / H×（C 2 2×H 0.8 W 0 + 在上式中，C 1 = 7.475，C 2 = 5.98，C 3 = C 9，C 3 = 0.48，C4 = -0.96，H是绝缘层的厚度，W0是差分传输线的原始宽度，S0是差动传输线之间的原始空间，T是各个差分传输线的厚度差动传输线。

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