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1. 发明申请

US20070166516A1 FLOORING TILE PRODUCIBLE BY CONTINUOUS PROCESS AND HAVING THREE-DIMENSIONAL EFFECT, AND PROCESS FOR PREPARING THE SAME 审中-公开
标题翻译：通过连续工艺生产并具有三维效应的地板铺面及其制备方法
公开(公告)号：US20070166516A1
公开(公告)日：2007-07-19
申请号：US11549736
申请日：2006-10-16
申请人： Gyu-Yull Kim , Chang-Hwan Park , Chang-Il Kim
发明人： Gyu-Yull Kim , Chang-Hwan Park , Chang-Il Kim
IPC分类号： B32B3/00
CPC分类号： B32B27/08 , B32B3/30 , B32B5/16 , B32B27/22 , B32B27/304 , B32B38/06 , B32B38/145 , B32B2250/246 , B32B2255/10 , B32B2255/26 , B32B2262/101 , B32B2307/412 , B32B2307/734 , B32B2307/75 , B32B2327/06 , B32B2419/04 , B44C5/04 , Y10T428/24612
摘要： Disclosed are a flooring time including a substrate layer, printed layer, and transparent film, which are laminated from the bottom, and concave patterns mechanically embossed on the substrate layer and printed layer at the same time, and a process for preparing the flooring tile. The laminating and embossing operation of the respective layers are successively performed by use of a series of successively arranged rolls.
摘要翻译：公开了包括从底部层叠的基材层，印刷层和透明膜的地板时间，以及同时机械压花在基材层和印刷层上的凹形图案，以及地板砖的制备方法。各层的层叠和压花操作通过使用一系列连续布置的辊连续进行。

2. 发明授权

US07978547B2 Data I/O control signal generating circuit in a semiconductor memory apparatus 有权
标题翻译：半导体存储装置中的数据I / O控制信号发生电路
公开(公告)号：US07978547B2
公开(公告)日：2011-07-12
申请号：US12834837
申请日：2010-07-12
申请人： Chang-Il Kim
发明人： Chang-Il Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/22 , G11C7/1045 , G11C7/222
摘要： A circuit for generating a data I/O control signal used in a semiconductor memory apparatus comprises a delay block for generating a delay signal having a relatively short delay value and a delay signal having a relatively long delay values, and a selection block for selecting any one of the delay signals according to an operational mode. The selection block selects an output signal of the first delay unit in a high-speed operation mode and selects an output signal of the second delay unit in a low-speed operation mode.
摘要翻译：用于产生在半导体存储装置中使用的数据I / O控制信号的电路包括：延迟块，用于产生具有相对较短延迟值的延迟信号和具有相对较长延迟值的延迟信号;以及选择块，用于选择任何根据操作模式的一个延迟信号。选择块以高速运行模式选择第一延迟单元的输出信号，并以低速运转模式选择第二延迟单元的输出信号。

3. 发明授权

US07755954B2 Data I/O control signal generating circuit in a semiconductor memory apparatus 有权
标题翻译：半导体存储装置中的数据I / O控制信号发生电路
公开(公告)号：US07755954B2
公开(公告)日：2010-07-13
申请号：US11950172
申请日：2007-12-04
申请人： Chang-Il Kim
发明人： Chang-Il Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/22 , G11C7/1045 , G11C7/222
摘要： A circuit for generating a data I/O control signal used in a semiconductor memory apparatus comprises a delay block for generating a delay signal having a relatively short delay value and a delay signal having a relatively long delay values, and a selection block for selecting any one of the delay signals according to an operational mode. The selection block selects an output signal of the first delay unit in a high-speed operation mode and selects an output signal of the second delay unit in a low-speed operation mode.
摘要翻译：用于产生在半导体存储装置中使用的数据I / O控制信号的电路包括：延迟块，用于产生具有相对较短延迟值的延迟信号和具有相对较长延迟值的延迟信号;以及选择块，用于选择任何根据操作模式的一个延迟信号。选择块以高速运行模式选择第一延迟单元的输出信号，并以低速运转模式选择第二延迟单元的输出信号。

4. 发明授权

US07616511B2 Input/output line sense amplifier and semiconductor memory device using the same 有权
标题翻译：输入/输出线路读出放大器和半导体存储器件使用相同
公开(公告)号：US07616511B2
公开(公告)日：2009-11-10
申请号：US12004228
申请日：2007-12-20
申请人： Chang-Il Kim
发明人： Chang-Il Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1057 , G11C7/1069 , G11C7/1078 , G11C7/1084 , G11C7/1096 , G11C7/18
摘要： An input/output (I/O) line sense amplifier includes a buffer unit, a sense amplifier, and a precharge unit. The buffer unit is driven by a first level voltage to buffer a strobe signal, and the sense amplifier is driven by a second level voltage to amplify a signal of an I/O line in response to an output signal of the buffer unit. The precharge unit is driven by the first level voltage to precharge an output signal of the sense amplifier in response to the output signal of the buffer unit.
摘要翻译：输入/输出（I / O）线路读出放大器包括缓冲单元，读出放大器和预充电单元。缓冲单元由第一电平电压驱动以缓冲选通信号，并且读出放大器由第二电平电压驱动，以响应于缓冲单元的输出信号来放大I / O线的信号。预充电单元由第一电平电压驱动，以响应于缓冲单元的输出信号对读出放大器的输出信号进行预充电。

5. 发明授权

US09007755B2 Flat panel type image display device and method for manufacturing the same 有权
标题翻译：平板型图像显示装置及其制造方法
公开(公告)号：US09007755B2
公开(公告)日：2015-04-14
申请号：US13542457
申请日：2012-07-05
申请人： Chang-Il Kim , Byung In Park
发明人： Chang-Il Kim , Byung In Park
IPC分类号： G02F1/1333 , G09F9/33 , H05K5/00
CPC分类号： G09F9/33 , H05K5/0013 , Y10T29/49826
摘要： Disclosed are a flat panel type image display device of a clear borderless design without a case defining an external appearance of an image display device, and a method for manufacturing the same. The flat panel type image display device includes an image display panel to display an image, a panel guide including a panel fixing portion, to which the image display panel is attached, and a guide frame formed in a dual coupling structure, the panel fixing portion being configured to move together with the guide frame in at least one direction of x, y, and z-axis directions, and a bottom case formed to cover an opened back surface of the panel guide comprising a back surface of the image display panel, the bottom case being fixed to an inner side surface of the panel guide.
摘要翻译：公开了一种清晰无边界设计的平板式图像显示装置及其制造方法，而没有限定图像显示装置的外观的外壳。平板型图像显示装置包括显示图像的图像显示面板，包括安装有图像显示面板的面板固定部的面板引导件和形成为双重联接结构的引导框架，面板固定部被配置为沿x，y和z轴方向的至少一个方向与引导框架一起移动，并且底壳形成为覆盖面板引导件的打开的后表面，包括图像显示面板的后表面，底壳固定到面板导向件的内侧表面。

6. 发明授权

US07821857B2 Input/output line sense amplifier and semiconductor memory device using the same 有权
标题翻译：输入/输出线路读出放大器和半导体存储器件使用相同
公开(公告)号：US07821857B2
公开(公告)日：2010-10-26
申请号：US12586752
申请日：2009-09-28
申请人： Chang-Il Kim
发明人： Chang-Il Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/1048 , G11C7/1051 , G11C7/1057 , G11C7/1069 , G11C7/1078 , G11C7/1084 , G11C7/1096 , G11C7/18
摘要： An input/output (I/O) line sense amplifier includes a buffer unit, a sense amplifier, and a precharge unit. The buffer unit is driven by a first level voltage to buffer a strobe signal, and the sense amplifier is driven by a second level voltage to amplify a signal of an I/O line in response to an output signal of the buffer unit. The precharge unit is driven by the first level voltage to precharge an output signal of the sense amplifier in response to the output signal of the buffer unit.
摘要翻译：输入/输出（I / O）线路读出放大器包括缓冲单元，读出放大器和预充电单元。缓冲单元由第一电平电压驱动以缓冲选通信号，并且读出放大器由第二电平电压驱动，以响应于缓冲单元的输出信号来放大I / O线的信号。预充电单元由第一电平电压驱动，以响应于缓冲单元的输出信号对读出放大器的输出信号进行预充电。

7. 发明申请

US20060038515A1 Stopping noise reduction circuit for start motor using resistor 有权
标题翻译：停止使用电阻启动电机的降噪电路
公开(公告)号：US20060038515A1
公开(公告)日：2006-02-23
申请号：US11201011
申请日：2005-08-10
申请人： Chang-Il Kim , Ji-Gon Kim , Soon-Sik Park , Hyun-Cheul Ahn
发明人： Chang-Il Kim , Ji-Gon Kim , Soon-Sik Park , Hyun-Cheul Ahn
IPC分类号： H02P1/00
CPC分类号： F02N15/003 , F02N11/0859 , H02P1/021 , H02P3/12
摘要： A stopping noise reduction circuit for a start motor comprises a battery generating a power supply to drive the start motor, a key switch for controlling an on/off of the power supply, a solenoid having a permanent magnet, P and H coils, and a movement contact to drive the start motor, and further comprises a B1 terminal grounded inside the solenoid, an M1 terminal connected to an M terminal of the start motor, and a resistor coupled with the B1 or M1 terminal. In the stopping noise reduction circuit, upon an off condition of the key switch, the movement contact of the solenoid is connected to the B1 and M1 terminals such that more induced current than an induced current flowing into the P and H coils, in a current induced by a rotator of the start motor, flows to ground via the resistor within a short flow time.
摘要翻译：用于启动电动机的停止噪声降低电路包括产生用于驱动起动电动机的电源的电池，用于控制电源的接通/断开的钥匙开关，具有永久磁铁，P和H线圈的螺线管，以及运动触点，以驱动起动电动机，并且还包括接地在螺线管内的B 1端子，连接到起动电动机的M端子的M 1端子和与B 1或M 1端子耦合的电阻器。在停止降噪电路中，在钥匙开关断开的情况下，螺线管的运动接触被连接到B 1和M 1端子，使得比流入P和H线圈的感应电流更多的感应电流，由起动电动机的转子感应的电流在短流时间内经由电阻器流到地。

8. 发明授权

US08462055B2 Portable terminal 有权
标题翻译：便携式终端
公开(公告)号：US08462055B2
公开(公告)日：2013-06-11
申请号：US12781025
申请日：2010-05-17
申请人： Young-Seok Jin , Chang-Il Kim
发明人： Young-Seok Jin , Chang-Il Kim
IPC分类号： H01Q1/24
CPC分类号： H01Q1/243 , H01Q1/52
摘要： A portable terminal comprises: a terminal body having a receiver for sound output; a first antenna disposed in the terminal body, and operating at a first band; a second antenna disposed at a position different from the first antenna, and operating at a second band, wherein the second antenna comprises: a first conductor having a physical condition to be operable at the second band; and a second conductor having a physical condition to resonate an electromagnetic wave of the first band so as to reduce a field strength of the first band near the to receiver.
摘要翻译：便携式终端包括：具有用于声音输出的接收机的终端主体; 第一天线，设置在终端主体中，并在第一频带上操作; 第二天线，其设置在与所述第一天线不同的位置处，并且在第二频带处操作，其中所述第二天线包括：第一导体，具有可在所述第二频带处操作的物理条件; 以及具有使所述第一频带的电磁波谐振的物理条件的第二导体，以便减小靠近所述接收机的所述第一频带的场强。

9. 发明授权

US07126295B2 Stopping noise reduction circuit for start motor using resistor 有权
公开(公告)号：US07126295B2
公开(公告)日：2006-10-24
申请号：US11201011
申请日：2005-08-10
申请人： Chang-Il Kim , Ji-Gon Kim , Soon-Sik Park , Hyun-Cheul Ahn
发明人： Chang-Il Kim , Ji-Gon Kim , Soon-Sik Park , Hyun-Cheul Ahn
IPC分类号： H02P1/00
CPC分类号： F02N15/003 , F02N11/0859 , H02P1/021 , H02P3/12
摘要： A stopping noise reduction circuit for a start motor comprises a battery generating a power supply to drive the start motor, a key switch for controlling an on/off of the power supply, a solenoid having a permanent magnet, P and H coils, and a movement contact to drive the start motor, and further comprises a B1 terminal grounded inside the solenoid, an M1 terminal connected to an M terminal of the start motor, and a resistor coupled with the B1 or M1 terminal. In the stopping noise reduction circuit, upon an off condition of the key switch, the movement contact of the solenoid is connected to the B1 and M1 terminals such that more induced current than an induced current flowing into the P and H coils, in a current induced by a rotator of the start motor, flows to ground via the resistor within a short flow time.

10. 发明授权

US06509244B2 Method for forming storage node electrode using a polysilicon hard mask on a sacrificial insulation film 失效
标题翻译：在牺牲绝缘膜上使用多晶硅硬掩模形成存储节点电极的方法
公开(公告)号：US06509244B2
公开(公告)日：2003-01-21
申请号：US09888908
申请日：2001-06-25
申请人： Chang-Il Kim , Chen-kwon Oh
发明人： Chang-Il Kim , Chen-kwon Oh
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L27/10852 , H01L27/10894
摘要： A method for forming a storage node electrode of a semiconductor device, includes the steps of: forming a contact plug in an interlayer insulation film on a semiconductor substrate; sequentially stacking etch stop films, a sacrificial insulation film, a polysilicon hard mask and a reflection preventative film on the surface of the interlayer insulation film; forming an opening by etching the hard mask, the sacrificial insulation film and the etch stop films to remove the reflection preventative film to obtain a storage node electrode region; forming a storage node electrode by depositing a conductive material over the resultant structure; forming a filling film for filling up the opening; etching the filling film, the storage node electrode and the hard mask so that the hard mask has a predetermined thickness; and etching the resultant structure with a chemical mechanical polishing process so that the residual hard mask can be completely removed. Thus, the sacrificial insulation film is not excessively etched, thereby preventing an etch step of the sacrificial insulation film between a peripheral region and a cell region, and also obtaining a sufficient capacity of the storage node electrode.
摘要翻译：一种用于形成半导体器件的存储节点电极的方法，包括以下步骤：在半导体衬底上的层间绝缘膜中形成接触插塞; 在层间绝缘膜的表面依次层叠蚀刻停止膜，牺牲绝缘膜，多晶硅硬掩模和防反射膜; 通过蚀刻硬掩模，牺牲绝缘膜和蚀刻停止膜来形成开口，以去除反射预防膜以获得存储节点电极区域; 通过在所得结构上沉积导电材料形成存储节点电极; 形成用于填充开口的填充膜; 蚀刻填充膜，存储节点电极和硬掩模，使得硬掩模具有预定厚度; 并用化学机械抛光工艺蚀刻所得到的结构，从而可以完全去除残留的硬掩模。因此，牺牲绝缘膜不会被过度蚀刻，从而防止牺牲绝缘膜在周边区域和单元区域之间的蚀刻步骤，并且还获得足够的存储节点电极的容量。

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