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1. 发明授权

US07882498B2 Method, system, and program of a compiler to parallelize source code 有权
标题翻译：编译器的方法，系统和程序来并行化源代码
公开(公告)号：US07882498B2
公开(公告)日：2011-02-01
申请号：US11278329
申请日：2006-03-31
申请人： Guilherme D. Ottoni , Xinmin Tian , Hong Wang , Richard A. Hankins , Wei Li , John Shen
发明人： Guilherme D. Ottoni , Xinmin Tian , Hong Wang , Richard A. Hankins , Wei Li , John Shen
IPC分类号： G06F9/45
CPC分类号： G06F8/456 , G06F8/314
摘要： Provided are a method, system, and program for parallelizing source code with a compiler. Source code including source code statements is received. The source code statements are processed to determine a dependency of the statements. Multiple groups of statements are determined from the determined dependency of the statements, wherein statements in one group are dependent on one another. At least one directive is inserted in the source code, wherein each directive is associated with one group of statements. Resulting threaded code is generated including the inserted at least one directive. The group of statements to which the directive in the resulting threaded code applies are processed as a separate task. Each group of statements designated by the directive to be processed as a separate task may be processed concurrently with respect to other groups of statements.
摘要翻译：提供了一种用于将源代码并行化为编译器的方法，系统和程序。收到包含源代码语句的源代码。处理源代码语句以确定语句的依赖关系。根据确定的语句依赖关系确定多组语句，其中一组中的语句彼此依赖。在源代码中插入至少一个指令，其中每个指令与一组语句相关联。产生的结果线程代码包括插入的至少一个指令。生成的线程代码中的指令所适用的语句组被处理为单独的任务。指定为要作为单独任务处理的指令的每组语句可以与其他语句组并发处理。

2. 发明授权

US08205200B2 Compiler-based scheduling optimization hints for user-level threads 有权
标题翻译：基于编译器的调度优化提示用户级线程
公开(公告)号：US08205200B2
公开(公告)日：2012-06-19
申请号：US11289803
申请日：2005-11-29
申请人： Shih-wei Liao , Ryan N. Rakvic , Richard A. Hankins , Hong Wang , Gansha Wu , Guei-Yuan Lueh , Xinmin Tian , Paul M. Petersen , Sanjiv Shah , Trung Diep , John Shen , Gautham Chinya
发明人： Shih-wei Liao , Ryan N. Rakvic , Richard A. Hankins , Hong Wang , Gansha Wu , Guei-Yuan Lueh , Xinmin Tian , Paul M. Petersen , Sanjiv Shah , Trung Diep , John Shen , Gautham Chinya
IPC分类号： G06F9/44 , G06F9/46
CPC分类号： G06F9/485 , G06F9/4881
摘要： Method, apparatus and system embodiments to schedule user-level OS-independent “shreds” without intervention of an operating system. For at least one embodiment, the shred is scheduled for execution by a scheduler routine rather than the operating system. The scheduler routine may receive compiler-generated hints from a compiler. The compiler hints may be generated by the compiler without user-provided pragmas, and may be passed to the scheduler routine via an API-like interface. The interface may include a scheduling hint data structure that is maintained by the compiler. Other embodiments are also described and claimed.
摘要翻译：方法，装置和系统实施例来调度用户级别的与OS无关的“碎片”，而不需要操作系统的干预。对于至少一个实施例，碎片被调度为由调度器例程而不是操作系统执行。调度程序例程可以从编译器接收编译器生成的提示。编译器提示可能由编译器生成，而不需要用户提供的编译指示，并且可以通过类API接口传递给调度程序。接口可以包括由编译器维护的调度提示数据结构。还描述和要求保护其他实施例。

3. 发明申请

US20060070047A1 System, method and apparatus for dependency chain processing 有权
公开(公告)号：US20060070047A1
公开(公告)日：2006-03-30
申请号：US10950693
申请日：2004-09-28
申请人： Satish Narayanasamy , Hong Wang , John Shen , Roni Rosner , Yoav Almog , Naftali Schwartz , Gerolf Hoflehner , Daniel LaVery , Wei Li , Xinmin Tian , Milind Girkar , Perry Wang
发明人： Satish Narayanasamy , Hong Wang , John Shen , Roni Rosner , Yoav Almog , Naftali Schwartz , Gerolf Hoflehner , Daniel LaVery , Wei Li , Xinmin Tian , Milind Girkar , Perry Wang
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/433 , G06F8/451
摘要： Embodiments of the present invention provide a method, apparatus and system which may include splitting a dependency chain into a set of reduced-width dependency chains; mapping one or more dependency chains onto one or more clustered dependency chain processors, wherein an issue-width of one or more of the clusters is adapted to accommodate a size of the dependency chains; and/or processing in parallel a plurality of dependency chains of a trace. Other embodiments are described and claimed.

4. 发明授权

US07603546B2 System, method and apparatus for dependency chain processing 有权
标题翻译：用于依赖关系链处理的系统，方法和装置
公开(公告)号：US07603546B2
公开(公告)日：2009-10-13
申请号：US10950693
申请日：2004-09-28
申请人： Satish Narayanasamy , Hong Wang , John Shen , Roni Rosner , Yoav Almog , Naftali Schwartz , Gerolf Hoflehner , Daniel LaVery , Wei Li , Xinmin Tian , Milind Girkar , Perry Wang
发明人： Satish Narayanasamy , Hong Wang , John Shen , Roni Rosner , Yoav Almog , Naftali Schwartz , Gerolf Hoflehner , Daniel LaVery , Wei Li , Xinmin Tian , Milind Girkar , Perry Wang
IPC分类号： G06F9/00 , G06F9/24 , G06F15/177
CPC分类号： G06F8/443 , G06F8/433 , G06F8/451
摘要： Embodiments of the present invention provide a method, apparatus and system which may include splitting a dependency chain into a set of reduced-width dependency chains; mapping one or more dependency chains onto one or more clustered dependency chain processors, wherein an issue-width of one or more of the clusters is adapted to accommodate a size of the dependency chains; and/or processing in parallel a plurality of dependency chains of a trace. Other embodiments are described and claimed.
摘要翻译：本发明的实施例提供了一种方法，装置和系统，其可以包括将依赖链分解成一组缩减宽度的依赖性链; 将一个或多个依赖关系链映射到一个或多个聚类依赖链处理器上，其中一个或多个所述簇的问题宽度适于适应所述依赖链的大小; 和/或并行处理多个跟踪的依赖性链。描述和要求保护其他实施例。

5. 发明申请

US20070079298A1 Thread-data affinity optimization using compiler 有权
标题翻译：线程数据亲和力优化使用编译器
公开(公告)号：US20070079298A1
公开(公告)日：2007-04-05
申请号：US11242489
申请日：2005-09-30
申请人： Xinmin Tian , Milind Girkar , David Sehr , Richard Grove , Wei Li , Hong Wang , Chris Newburn , Perry Wang , John Shen
发明人： Xinmin Tian , Milind Girkar , David Sehr , Richard Grove , Wei Li , Hong Wang , Chris Newburn , Perry Wang , John Shen
IPC分类号： G06F9/45
CPC分类号： G06F8/45
摘要： Thread-data affinity optimization can be performed by a compiler during the compiling of a computer program to be executed on a cache coherent non-uniform memory access (cc-NUMA) platform. In one embodiment, the present invention includes receiving a program to be compiled. The received program is then compiled in a first pass and executed. During execution, the compiler collects profiling data using a profiling tool. Then, in a second pass, the compiler performs thread-data affinity optimization on the program using the collected profiling data.
摘要翻译：线程数据亲和度优化可以在编译要在高速缓存相干非均匀内存访问（cc-NUMA）平台上执行的计算机程序时由编译器执行。在一个实施例中，本发明包括接收要编译的程序。接收的程序然后被编译成第一遍并被执行。在执行期间，编译器使用分析工具收集分析数据。然后，在第二遍，编译器使用收集的分析数据对程序执行线程数据关联优化。

6. 发明授权

US08037465B2 Thread-data affinity optimization using compiler 有权
标题翻译：线程数据亲和力优化使用编译器
公开(公告)号：US08037465B2
公开(公告)日：2011-10-11
申请号：US11242489
申请日：2005-09-30
申请人： Xinmin Tian , Milind Girkar , David C. Sehr , Richard Grove , Wei Li , Hong Wang , Chris Newburn , Perry Wang , John Shen
发明人： Xinmin Tian , Milind Girkar , David C. Sehr , Richard Grove , Wei Li , Hong Wang , Chris Newburn , Perry Wang , John Shen
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F8/45
摘要： Thread-data affinity optimization can be performed by a compiler during the compiling of a computer program to be executed on a cache coherent non-uniform memory access (cc-NUMA) platform. In one embodiment, the present invention includes receiving a program to be compiled. The received program is then compiled in a first pass and executed. During execution, the compiler collects profiling data using a profiling tool. Then, in a second pass, the compiler performs thread-data affinity optimization on the program using the collected profiling data.
摘要翻译：线程数据亲和度优化可以在编译要在高速缓存相干非均匀内存访问（cc-NUMA）平台上执行的计算机程序时由编译器执行。在一个实施例中，本发明包括接收要编译的程序。接收的程序然后被编译成第一遍并被执行。在执行期间，编译器使用分析工具收集分析数据。然后，在第二遍，编译器使用收集的分析数据对程序执行线程数据关联优化。

7. 发明申请

US20070234276A1 METHOD, SYSTEM, AND PROGRAM OF A COMPILER TO PARALLELIZE SOURCE CODE 有权
标题翻译：编译器并行源代码的方法，系统和程序
公开(公告)号：US20070234276A1
公开(公告)日：2007-10-04
申请号：US11278329
申请日：2006-03-31
申请人： Guilherme Ottoni , Xinmin Tian , Hong Wang , Richard Hankins , Wei Li , John Shen
发明人： Guilherme Ottoni , Xinmin Tian , Hong Wang , Richard Hankins , Wei Li , John Shen
IPC分类号： G06F9/44
CPC分类号： G06F8/456 , G06F8/314
摘要： Provided are a method, system, and program for parallelizing source code with a compiler. Source code including source code statements is received. The source code statements are processed to determine a dependency of the statements. Multiple groups of statements are determined from the determined dependency of the statements, wherein statements in one group are dependent on one another. At least one directive is inserted in the source code, wherein each directive is associated with one group of statements. Resulting threaded code is generated including the inserted at least one directive. The group of statements to which the directive in the resulting threaded code applies are processed as a separate task. Each group of statements designated by the directive to be processed as a separate task may be processed concurrently with respect to other groups of statements.
摘要翻译：提供了一种用于将源代码并行化为编译器的方法，系统和程序。收到包含源代码语句的源代码。处理源代码语句以确定语句的依赖关系。根据确定的语句依赖关系确定多组语句，其中一组中的语句彼此依赖。在源代码中插入至少一个指令，其中每个指令与一组语句相关联。产生的结果线程代码包括插入的至少一个指令。生成的线程代码中的指令所适用的语句组被处理为单独的任务。指定为要作为单独任务处理的指令的每组语句可以与其他语句组并发处理。

8. 发明申请

US20110307876A1 REGISTER MAPPING TECHNIQUES FOR EFFICIENT DYNAMIC BINARY TRANSLATION 有权
标题翻译：用于有效动态二进制翻译的注册映射技术
公开(公告)号：US20110307876A1
公开(公告)日：2011-12-15
申请号：US12815023
申请日：2010-06-14
申请人： Guilherme D. Ottoni , Hong Wang , Wei Li
发明人： Guilherme D. Ottoni , Hong Wang , Wei Li
IPC分类号： G06F9/45
CPC分类号： G06F8/441 , G06F9/45525
摘要： Generally, the present disclosure provides a system and method for mapping registers from a system with more registers to a system with fewer registers. Regions may be formed that include one or more blocks of code with relatively frequent register accesses. The most frequently accessed source registers may be mapped to target registers. Each block in the region may be bounded by a prologue and at least one epilogue. The prologue may be configured to implement register mapping and the epilogue(s) may be configured to manage program flow from a block in the region to another block in the region or to a block not in the region.
摘要翻译：通常，本公开提供了一种用于将具有更多寄存器的系统的寄存器映射到具有较少寄存器的系统的系统和方法。可以形成包括具有相对频繁的寄存器访问的一个或多个代码块的区域。最常访问的源寄存器可能被映射到目标寄存器。该区域中的每个块可以由前序和至少一个结尾界定。序言可以被配置为实现寄存器映射，并且结尾可以被配置为管理从该区域中的块到该区域中的另一块或者不在该区域中的块的程序流。

9. 发明申请

US20110153990A1 SYSTEM, APPARATUS, AND METHOD FOR SUPPORTING CONDITION CODES 有权
标题翻译：系统，设备和支持条件代码的方法
公开(公告)号：US20110153990A1
公开(公告)日：2011-06-23
申请号：US12646762
申请日：2009-12-23
申请人： Guilherme D. Ottoni , Hong Wang , Christopher T. Weaver , Thomas A. Hartin , Wei Li , Jason W. Brandt
发明人： Guilherme D. Ottoni , Hong Wang , Christopher T. Weaver , Thomas A. Hartin , Wei Li , Jason W. Brandt
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/30058 , G06F9/30094 , G06F9/30116
摘要： An apparatus is described having decode circuitry to decode a first instruction, wherein the first instruction indicates that a copy of a plurality of condition codes bits is to be copied from a first register to a second register. The apparatus also has first execution circuitry to copy a plurality of condition code bits from a first register to a second register.
摘要翻译：描述了一种装置，其具有用于解码第一指令的解码电路，其中第一指令指示要从第一寄存器复制到多个条件码位的副本到第二寄存器。该装置还具有第一执行电路，用于将多个状态码位从第一寄存器复制到第二寄存器。

10. 发明授权

US09952864B2 System, apparatus, and method for supporting condition codes 有权
公开(公告)号：US09952864B2
公开(公告)日：2018-04-24
申请号：US12646762
申请日：2009-12-23
申请人： Guilherme D. Ottoni , Hong Wang , Christopher T. Weaver , Thomas A. Hartin , Wei Li , Jason W. Brandt
发明人： Guilherme D. Ottoni , Hong Wang , Christopher T. Weaver , Thomas A. Hartin , Wei Li , Jason W. Brandt
IPC分类号： G06F9/30
CPC分类号： G06F9/30058 , G06F9/30094 , G06F9/30116
摘要： An apparatus is described having decode circuitry to decode a first instruction, wherein the first instruction indicates that a copy of a plurality of condition codes bits is to be copied from a first register to a second register. The apparatus also has first execution circuitry to copy a plurality of condition code bits from a first register to a second register.

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