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1. 发明授权

US06521469B1 Line monitoring of negative bias temperature instabilities by hole injection methods 失效
标题翻译：通过空穴注入法线性监测负偏压温度不稳定性
公开(公告)号：US06521469B1
公开(公告)日：2003-02-18
申请号：US09668987
申请日：2000-09-25
申请人： Giuseppe La Rosa , Fernando J. Guarin , Stewart E. Rauch, III
发明人： Giuseppe La Rosa , Fernando J. Guarin , Stewart E. Rauch, III
IPC分类号： H01L2166
CPC分类号： H01L22/14
摘要： A process for in-line testing of a metal-oxide-semiconductor field effect transistor (MOSFET) device for negative bias thermal instability (NBTI), which degrades the gate oxide of the MOSFET device. The process generally comprises four steps. First, a hole injection method is selected that produces approximately the same gate oxide degradation as the NBTI under test. Second, a correlation is established between the NBTI degradation and device shifts due to the selected hole injection degradation method. Third, an in-line procedure is developed based on the hole injection method, using the second step to relate the measured shift to NBTI. Finally, a NBTI specification is defined based on the hole injection method using the second step. The MOSFET device is preferably a p-type MOSFET device and the hole injection method is preferably a channel hot-carrier stress method.
摘要翻译：用于负偏压热不稳定性（NBTI）的金属氧化物半导体场效应晶体管（MOSFET）器件的在线测试的过程，其降低MOSFET器件的栅极氧化物。该方法通常包括四个步骤。首先，选择产生与测试中的NBTI大致相同的栅极氧化物降解的空穴注入方法。其次，由于所选择的空穴注入降解方法，在NBTI劣化和器件移位之间建立了相关性。第三，基于空穴注入方法开发了一种在线程序，使用第二步将测量的移位与NBTI相关联。最后，基于使用第二步骤的空穴注入方法来定义NBTI规范。 MOSFET器件优选为p型MOSFET器件，并且空穴注入法优选为沟道热载流子应力法。

2. 发明授权

US06958621B2 Method and circuit for element wearout recovery 失效
标题翻译：元件回流的方法和电路
公开(公告)号：US06958621B2
公开(公告)日：2005-10-25
申请号：US10725984
申请日：2003-12-02
申请人： Giuseppe La Rosa , Joseph M. Lukaitis , Anastasios A. Katsetos , Stewart E. Rauch, III , Ping-Chuan Wang , Stephen P. Boffoli , Fernando J. Guarin , B. B. (Bob) Lawhorn
发明人： Giuseppe La Rosa , Joseph M. Lukaitis , Anastasios A. Katsetos , Stewart E. Rauch, III , Ping-Chuan Wang , Stephen P. Boffoli , Fernando J. Guarin , B. B. (Bob) Lawhorn
IPC分类号： H01L27/02 , H03K19/003 , H03K19/0175
CPC分类号： H01L27/0207
摘要： A recovery circuit and a method for employing the same are provided. The recovery circuit has a current driver and, preferably two pass-gates, a first pass-gate connected in series to the current driver and a second pass-gate connected to a ground. The recovery circuit also has a recovery assembly or element and one or more contacts operatively connecting the recovery circuit to a wearout sensitive circuit or circuit element.
摘要翻译：提供一种恢复电路及其应用方法。恢复电路具有电流驱动器，并且优选地是两个通过门，与电流驱动器串联连接的第一通过栅极和连接到地的第二通过栅极。恢复电路还具有恢复组件或元件以及可操作地将恢复电路连接到耗损敏感电路或电路元件的一个或多个触点。

3. 发明授权

US06456104B1 Method and structure for in-line monitoring of negative bias temperature instability in field effect transistors 失效
标题翻译：在线监测场效应晶体管负偏温度不稳定性的方法和结构
公开(公告)号：US06456104B1
公开(公告)日：2002-09-24
申请号：US09377335
申请日：1999-08-18
申请人： Fernando J. Guarin , Anastasios A. Katsetos , Stewart E. Rauch, III
发明人： Fernando J. Guarin , Anastasios A. Katsetos , Stewart E. Rauch, III
IPC分类号： G01R3102
CPC分类号： G01R31/2621
摘要： A MOSFET test structure and associated electronics for rapidly heating the MOSFET gate oxide and for applying a stress voltage to the gate. The structure has at least one polysilicon gate with two spaced contacts that permit a heating current to flow through the gate thus rapidly raising the gate temperature to a desired level. External electronics permit applying a measured stress voltage to the gate. The structure is particularly useful in NBTI testing of p-MOSFETs.
摘要翻译： MOSFET测试结构和相关的电子元件，用于快速加热MOSFET栅极氧化物并向栅极施加应力电压。该结构具有至少一个多晶硅栅极，其具有两个间隔开的接触，允许加热电流流过栅极，从而将栅极温度快速升高到期望的水平。外部电子器件允许将测量的应力电压施加到栅极。该结构在p-MOSFET的NBTI测试中特别有用。

4. 发明申请

US20100182729A1 METHOD OF OPERATING TRANSISTORS AND STRUCTURES THEREOF FOR IMPROVED RELIABILITY AND LIFETIME 有权
标题翻译：用于改善可靠性和寿命的晶体管及其结构的操作方法
公开(公告)号：US20100182729A1
公开(公告)日：2010-07-22
申请号：US12355815
申请日：2009-01-19
申请人： Ping-Chuan Wang , Zhijian Yang , Fernando J. Guarin , J. Edwin Hostetter , Kai D. Feng
发明人： Ping-Chuan Wang , Zhijian Yang , Fernando J. Guarin , J. Edwin Hostetter , Kai D. Feng
IPC分类号： H02H11/00 , H01L29/73 , H01L23/48
CPC分类号： H01L23/345 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the present invention provide a semiconductor device that includes a transistor device having a first, a second, and a third node; and an interconnect structure having at least one wire and the wire having a first and a second end with the first end of the wire being connected to one of the first, the second, and the third node of the transistor device. The wire is conductive and adapted to provide an operating current in a first direction during a normal operating mode, and adapted to provide a repairing current in a second direction opposite to the first direction during a repair mode of the semiconductor device. In one embodiment the transistor device is a bipolar transistor with the first, second, and third nodes being an emitter, a base, and a collector of the bipolar transistor. The wire is connected to one of the emitter and the collector. Method of operating the semiconductor device and current supplying circuit for the semiconductor device are also disclosed.
摘要翻译：本发明的实施例提供一种半导体器件，其包括具有第一，第二和第三节点的晶体管器件; 以及具有至少一根导线的互连结构，并且所述导线具有第一和第二端，所述导线的第一端连接到晶体管器件的第一，第二和第三节点之一。导线是导电的并且适于在正常操作模式期间在第一方向上提供工作电流，并且适于在半导体器件的修复模式期间在与第一方向相反的第二方向上提供修复电流。在一个实施例中，晶体管器件是双极晶体管，其中第一，第二和第三节点是双极晶体管的发射极，基极和集电极。导线连接到发射极和集电极之一。还公开了用于半导体器件的半导体器件和电流供应电路的操作方法。

5. 发明授权

US08159814B2 Method of operating transistors and structures thereof for improved reliability and lifetime 有权
标题翻译：操作晶体管及其结构的方法，以提高可靠性和寿命
公开(公告)号：US08159814B2
公开(公告)日：2012-04-17
申请号：US12355815
申请日：2009-01-19
申请人： Ping-Chuan Wang , Zhijian Yang , Fernando J. Guarin , J. Edwin Hostetter , Kai D Feng
发明人： Ping-Chuan Wang , Zhijian Yang , Fernando J. Guarin , J. Edwin Hostetter , Kai D Feng
IPC分类号： H01G7/02 , G01R31/04
CPC分类号： H01L23/345 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the present invention provide a semiconductor device that includes a transistor device having a first, a second, and a third node; and an interconnect structure having at least one wire and the wire having a first and a second end with the first end of the wire being connected to one of the first, the second, and the third node of the transistor device. The wire is conductive and adapted to provide an operating current in a first direction during a normal operating mode, and adapted to provide a repairing current in a second direction opposite to the first direction during a repair mode of the semiconductor device. In one embodiment the transistor device is a bipolar transistor with the first, second, and third nodes being an emitter, a base, and a collector of the bipolar transistor. The wire is connected to one of the emitter and the collector. Method of operating the semiconductor device and current supplying circuit for the semiconductor device are also disclosed.
摘要翻译：本发明的实施例提供一种半导体器件，其包括具有第一，第二和第三节点的晶体管器件; 以及具有至少一根导线的互连结构，并且所述导线具有第一和第二端，所述导线的第一端连接到晶体管器件的第一，第二和第三节点之一。导线是导电的并且适于在正常操作模式期间在第一方向上提供工作电流，并且适于在半导体器件的修复模式期间在与第一方向相反的第二方向上提供修复电流。在一个实施例中，晶体管器件是双极晶体管，其中第一，第二和第三节点是双极晶体管的发射极，基极和集电极。导线连接到发射极和集电极之一。还公开了用于半导体器件的半导体器件和电流供应电路的操作方法。

6. 发明授权

US5563428A Layered structure of a substrate, a dielectric layer and a single crystal layer 失效
标题翻译：基板，电介质层和单晶层的分层结构
公开(公告)号：US5563428A
公开(公告)日：1996-10-08
申请号：US380782
申请日：1995-01-30
申请人： Bruce A. Ek , Stephen M. Gates , Fernando J. Guarin , Subramanian S. Iyer , Adrian R. Powell
发明人： Bruce A. Ek , Stephen M. Gates , Fernando J. Guarin , Subramanian S. Iyer , Adrian R. Powell
IPC分类号： H01L21/02 , H01L21/04 , H01L21/20 , H01L27/12 , H01L31/10 , H01L31/18 , H01L33/00 , H01S5/00 , H01S5/323 , H01L31/0312 , H01L27/108 , H01L31/0328
CPC分类号： H01L33/007 , H01L21/0445 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： A structure is fabricated comprising a substrate, a dielectric layer formed over the substrate, and a single crystal layer of a compound formed over the dielectric layer. The single crystal layer is formed by the chemical reaction of at least a first element with an initial single crystal layer of a second element on the dielectric layer having an initial thickness of about 100 to about 10,000 angstroms.According to another aspect, a carbide single crystal layer is provided on a substrate by depositing carbon from a solid carbon source at a low rate and low temperature, followed by reacting the carbon with the underlying layer to convert it to the carbide.
摘要翻译：制造的结构包括衬底，在衬底上形成的电介质层和在电介质层上形成的化合物的单晶层。单晶层通过至少第一元素与电介质层上初始厚度为约100至约10,000埃的第二元素的初始单晶层的化学反应形成。根据另一方面，通过在低速率和低温下从固体碳源沉积碳，然后使碳与下层反应以将其转化为碳化物，在基板上提供碳化物单晶层。

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