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    • 2. 发明申请
    • Soft mold and method for fabricating the same
    • 软模具及其制造方法
    • US20060290025A1
    • 2006-12-28
    • US11314637
    • 2005-12-20
    • Gee ChaeGyoo JoJin KimChang Lee
    • Gee ChaeGyoo JoJin KimChang Lee
    • B29C33/40
    • B29C33/38B29C33/3857B29C33/40
    • A soft mold and a method for fabricating the same are disclosed. A master mold that has a pattern on a substrate is first formed. A first liquid high polymer precursor is formed on the master mold and then partially cured. A support film having high UV transmittance is attached to the partially cured high polymer. The attached support film and the partially cured high polymer are treated with a coupling agent and a second liquid high polymer precursor is formed on the partially cured high polymer and the support film. The second liquid high polymer precursor and the partially cured high polymer are then fully cured to form a mold. The fully cured mold is stripped from the master mold to form a soft mold having a predetermined shape on one surface.
    • 公开了一种软模具及其制造方法。 首先形成在基板上具有图案的母模。 在母模上形成第一液体高分子前体,然后部分固化。 具有高紫外线透过率的支撑膜附着在部分固化的高分子聚合物上。 附着的支撑膜和部分固化的高分子用偶联剂处理,第二液体高分子前体形成在部分固化的高分子聚合物和载体膜上。 然后将第二液体高分子前体和部分固化的高聚物完全固化以形成模具。 将完全固化的模具从主模具剥离以在一个表面上形成具有预定形状的软模具。
    • 7. 发明申请
    • Method of fabricating thin film transistor array substrate
    • 制造薄膜晶体管阵列基板的方法
    • US20050142714A1
    • 2005-06-30
    • US10969179
    • 2004-10-21
    • Gee ChaeJin Kim
    • Gee ChaeJin Kim
    • G09F9/30G09F9/00H01L21/336H01L21/77H01L21/84H01L29/786H01L21/8234
    • H01L27/124H01L27/1288
    • A method of fabricating a thin film transistor array substrate is provided. The method includes forming a first conductive pattern group on a substrate using a first etch resist and a first soft mold, the first conductive pattern group including a gate electrode and a gate line; forming a gate insulating film on the substrate and the first conductive pattern group; forming a second conductive pattern group and a semiconductor pattern on the gate insulating film using a second etch resist and a second soft mold, the second conductive pattern group having a source electrode, a drain electrode, and a data line, the semiconductor pattern defining a channel region between the source electrode and the drain electrode; forming a passivation film on the gate insulating film, the second conductive pattern group and the semiconductor pattern using a third etch resist and a third soft mold, the passivation film defining a contact hole therethrough; and forming a third conductive pattern group on the passivation film using a fourth etch resist and a fourth soft mold, the third conductive pattern group having a pixel electrode.
    • 提供一种制造薄膜晶体管阵列基板的方法。 该方法包括使用第一蚀刻抗蚀剂和第一软模在衬底上形成第一导电图案组,第一导电图案组包括栅电极和栅极线; 在所述基板和所述第一导电图案组上形成栅极绝缘膜; 在所述栅绝缘膜上形成第二导电图案组和半导体图案,使用第二蚀刻抗蚀剂和第二软模,所述第二导电图案组具有源电极,漏电极和数据线,所述半导体图案限定 源电极和漏电极之间的沟道区域; 在栅绝缘膜上形成钝化膜,使用第三蚀刻抗蚀剂和第三软模形成第二导电图案组和半导体图案,钝化膜限定穿过其中的接触孔; 以及使用第四蚀刻抗蚀剂和第四软模具在所述钝化膜上形成第三导电图案组,所述第三导电图案组具有像素电极。
    • 10. 发明申请
    • Array substrate of liquid crystal display device
    • 液晶显示装置的阵列基板
    • US20050168664A1
    • 2005-08-04
    • US11098408
    • 2005-04-05
    • Gee ChaeIk Kim
    • Gee ChaeIk Kim
    • G02F1/133G02F1/1362G02F1/1343
    • G02F1/136213G02F1/136227
    • An array substrate of a liquid crystal display device, wherein picture quality is improved without decreasing aperture ratio by providing a storage capacitor of a large capacity. The array substrate of a liquid crystal display device includes a gate line formed on an array substrate and a gate electrode diverged from the gate line. A common line composed of substantially the same material as the gate line of an opaque metal is arranged parallel to the gate line. A first electrode of a storage capacitor composed of a transparent conductive material is formed on the common line. A gate insulating film covers the gate line, the gate electrode, and the first electrode of a storage capacitor. A semiconductor layer is formed to overlap the gate electrode on the gate insulating film. A source electrode and a drain electrode are arranged with a constant interval on the semiconductor layer. A data line is connected to the source electrode and is arranged perpendicularly to the gate line. An insulating layer is formed on the data line, the source/drain electrodes, and the gate insulating film. A first contact hole is formed by removing the insulating layer so as to expose a part of the drain electrode. A pixel electrode is connected to the drain electrode through the first contact hole above the insulating layer.
    • 液晶显示装置的阵列基板,通过提供大容量的存储电容器,能够提高图像质量而不降低开口率。 液晶显示装置的阵列基板包括形成在阵列基板上的栅极线和从栅极线分离的栅电极。 由与不透明金属的栅极线基本上相同的材料构成的公共线与栅极线平行设置。 在公共线上形成由透明导电材料构成的储能电容器的第一电极。 栅极绝缘膜覆盖栅极线,栅电极和存储电容器的第一电极。 半导体层形成为与栅极绝缘膜上的栅电极重叠。 源电极和漏电极在半导体层上以恒定的间隔布置。 数据线连接到源电极并且垂直于栅极线布置。 在数据线,源极/漏极和栅极绝缘膜上形成绝缘层。 通过去除绝缘层以使露出一部分漏电极形成第一接触孔。 像素电极通过绝缘层上方的第一接触孔连接到漏电极。