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1. 发明授权

US09213344B2 Ripple suppressor circuit and method therefor 有权
标题翻译：纹波抑制电路及其方法
公开(公告)号：US09213344B2
公开(公告)日：2015-12-15
申请号：US13937943
申请日：2013-07-09
申请人： Gang Chen , Chunbo Liu , Gabor Reizik
发明人： Gang Chen , Chunbo Liu , Gabor Reizik
IPC分类号： G05F1/10 , H02M1/14 , H02M1/15 , H02M3/156 , H02M3/139 , H02M3/157
CPC分类号： G05F1/10 , H02M1/143 , H02M1/15 , H02M3/139 , H02M3/156 , H02M3/157
摘要： In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.
摘要翻译：在一个实施例中，形成纹波抑制电路的方法包括配置纹波抑制电路以接收代表请求电压的第一信号和作为第一信号的滤波值的第二信号。该方法还包括配置纹波抑制电路以响应于第一信号确定第二信号的峰值，并响应于第一信号确定第二信号的最小值。该方法还可以包括配置纹波抑制电路以形成峰值和最小值的平均值。

2. 发明申请

US20140049232A1 RIPPLE SUPPRESSOR CIRCUIT AND METHOD THEREFOR 有权
标题翻译：纹波抑制器电路及其方法
公开(公告)号：US20140049232A1
公开(公告)日：2014-02-20
申请号：US13937943
申请日：2013-07-09
申请人： Gang Chen , Chunbo Liu , Gabor Reizik
发明人： Gang Chen , Chunbo Liu , Gabor Reizik
IPC分类号： G05F1/10
CPC分类号： G05F1/10 , H02M1/143 , H02M1/15 , H02M3/139 , H02M3/156 , H02M3/157
摘要： In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.
摘要翻译：在一个实施例中，形成纹波抑制电路的方法包括配置纹波抑制电路以接收代表请求电压的第一信号和作为第一信号的滤波值的第二信号。该方法还包括配置纹波抑制电路以响应于第一信号确定第二信号的峰值，并响应于第一信号确定第二信号的最小值。该方法还可以包括配置纹波抑制电路以形成峰值和最小值的平均值。

3. 发明申请

US20140049240A1 MULTI-PHASE POWER SUPPLY CONTROLLER AND METHOD THEREFOR 有权
标题翻译：多相电源控制器及其方法
公开(公告)号：US20140049240A1
公开(公告)日：2014-02-20
申请号：US13958429
申请日：2013-08-02
申请人： Gang Chen , Gabor Reizik , Paul J. Harriman , KISUN LEE
发明人： Gang Chen , Gabor Reizik , Paul J. Harriman , KISUN LEE
IPC分类号： G05F1/10
CPC分类号： G05F1/10 , H02M3/156 , H02M3/158 , H02M3/1588 , H02M2001/0032 , H02M2003/1586 , Y02B70/1466 , Y02B70/16
摘要： In one embodiment, a method of forming a multi-channel power supply controller includes forming a plurality of channels configured to regulate an output voltage between first and second values, configuring the controller to select a channel that has a lowest current value and initiate forming a drive signal for that channel responsively to the output voltage having a value that is less than the first value, configuring a reset circuit for each channel to terminate the respective drive signal responsively to at least the output voltage having a value greater than the first value.
摘要翻译：在一个实施例中，形成多通道电源控制器的方法包括形成多个通道，其配置成调节第一和第二值之间的输出电压，配置控制器以选择具有最低电流值的通道，并启动形成响应于具有小于第一值的值的输出电压的该通道的驱动信号，配置每个通道的复位电路以响应于至少具有大于第一值的值的输出电压终止相应的驱动信号。

4. 发明授权

US09007048B2 Multi-phase power supply controller and method therefor 有权
标题翻译：多相电源控制器及其方法
公开(公告)号：US09007048B2
公开(公告)日：2015-04-14
申请号：US13958429
申请日：2013-08-02
申请人： Gang Chen , Gabor Reizik , Paul J. Harriman , Kisun Lee
发明人： Gang Chen , Gabor Reizik , Paul J. Harriman , Kisun Lee
IPC分类号： G05F1/10 , H02M3/156 , H02M3/158
CPC分类号： G05F1/10 , H02M3/156 , H02M3/158 , H02M3/1588 , H02M2001/0032 , H02M2003/1586 , Y02B70/1466 , Y02B70/16
摘要： In one embodiment, a method of forming a multi-channel power supply controller includes forming a plurality of channels configured to regulate an output voltage between first and second values, configuring the controller to select a channel that has a lowest current value and initiate forming a drive signal for that channel responsively to the output voltage having a value that is less than the first value, configuring a reset circuit for each channel to terminate the respective drive signal responsively to at least the output voltage having a value greater than the first value.
摘要翻译：在一个实施例中，形成多通道电源控制器的方法包括形成多个通道，其配置成调节第一和第二值之间的输出电压，配置控制器以选择具有最低电流值的通道，并启动形成响应于具有小于第一值的值的输出电压的该通道的驱动信号，配置每个通道的复位电路以响应于至少具有大于第一值的值的输出电压终止相应的驱动信号。

5. 发明申请

US20050156582A1 SWITCHED NOISE FILTER CIRCUIT FOR A DC-DC CONVERTER 有权
标题翻译：用于DC-DC转换器的开关噪声滤波电路
公开(公告)号：US20050156582A1
公开(公告)日：2005-07-21
申请号：US10762650
申请日：2004-01-21
申请人： Richard Redl , Yuxin Li , Gabor Reizik
发明人： Richard Redl , Yuxin Li , Gabor Reizik
IPC分类号： H02M3/156 , G05F1/40
CPC分类号： H02M3/156 , H02M1/44
摘要： A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Ton and Toff, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vfb with a fixed voltage Vref; at least one of Ton and Toff is a “modulated” interval which is terminated when Vfb crosses Vref due to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vfb during at least one of Ton and Toff, with the offset voltage disconnected from Vfb by the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vfb is reduced.
摘要翻译：用于DC-DC转换器的开关噪声滤波器电路，其使用瞬时输出电压来建立转换器的占空比。转换器分别对开关元件的开/关时间间隔T＆lt;和＆lt;＆lt;＆lt;＆gt;分开。开关控制电路包括连接在反馈节点和地之间的滤波电容，以及比较器，其将反馈电压V bias与固定电压V ref进行比较; 在T＆lt; / SUB＆gt;和T＆lt; off＆gt;之间的至少一个是“调制的”间隔，当V SUB>由于滤波电容的放电。开关噪声滤波器电路在至少一个T＆lt; / SUB＆gt;和T＆gt;关闭之间向偏移电压施加偏移电压，其中偏移电压从在调制间隔开始之后或不久之后，当适当地施加偏移电压时，耦合到V 的外部电磁噪声的影响减小。

6. 发明申请

US20060263031A1 Power supply output monitor 有权
标题翻译：电源输出监视器
公开(公告)号：US20060263031A1
公开(公告)日：2006-11-23
申请号：US11367003
申请日：2006-03-01
申请人： Tod Schiff , Rodney Goldhammer , Gabor Reizik
发明人： Tod Schiff , Rodney Goldhammer , Gabor Reizik
IPC分类号： G02B6/00
CPC分类号： H02M3/1584 , H02M3/156
摘要： A power supply monitoring system generates a monitor signal having information on more than one aspect of the power supply output. In one example embodiment, the monitor signal may be implemented as a square wave in which the duty cycle is proportional to output current, the peak amplitude is proportional to output voltage, and the average value is equal to output power.
摘要翻译：电源监视系统产生具有关于电源输出的多个方面的信息的监视器信号。在一个示例实施例中，监视信号可以被实现为方波，其中占空比与输出电流成比例，峰值幅度与输出电压成比例，平均值等于输出功率。

7. 发明授权

US06961396B2 Digital banking circuit 有权
标题翻译：数字银行电路
公开(公告)号：US06961396B2
公开(公告)日：2005-11-01
申请号：US09770543
申请日：2001-01-26
申请人： Jonathan M. Audy , Gabor Reizik , Richard Redl , Brian P. Erisman
发明人： Jonathan M. Audy , Gabor Reizik , Richard Redl , Brian P. Erisman
IPC分类号： H03G3/34 , H04B1/10
CPC分类号： H03G3/34
摘要： A digital blanking circuit allows a first digital input signal transition to be passed on to a following stage, but prohibits the passing of subsequent transitions for a predetermined blanking interval. One embodiment of the present invention employs rising edge and falling edge latches, the inputs of which receive the digital input signal and the outputs of which are connected to a two-to-one multiplexer. The mux output is connected to a blanking interval circuit, which is triggered to begin timing a blanking interval by a multiplexer output transition. The blanking interval circuit provides outputs which control the latches and selects the latch output to be transferred to the multiplexer output such that the multiplexer output is prevented from transitioning during a blanking interval. An “adaptive” blanking circuit is also described in which the blanking interval is terminated when the transition which triggered the start of the blanking interval propagates through an entire signal path, such that the blanking interval is automatically adjusted to be the same as the signal path delay.
摘要翻译：数字消隐电路允许将第一数字输入信号转换传递到后一级，但是在预定的消隐间隔期间禁止后续转换的传递。上升沿和下降沿锁存器的一个实施例采用上升沿和下降沿锁存器，其输入端接收数字输入信号，其输出端连接到二对多路复用器。多路复用器输出连接到消隐间隔电路，触发开始通过多路复用器输出转换定时消隐间隔。消隐间隔电路提供输出，其控制锁存器并选择要传送到多路复用器输出的锁存器输出，使得多路复用器输出在消隐间隔期间不被转换。还描述了一种“自适应”消隐电路，其中触发消隐间隔开始的转变通过整个信号路径传播的消隐间隔终止，使得消隐间隔被自动调整为与信号路径相同延迟。

8. 发明授权

US06958594B2 Switched noise filter circuit for a DC-DC converter 有权
标题翻译：用于DC-DC转换器的开关噪声滤波电路
公开(公告)号：US06958594B2
公开(公告)日：2005-10-25
申请号：US10762650
申请日：2004-01-21
申请人： Richard Redl , Yuxin Li , Gabor Reizik
发明人： Richard Redl , Yuxin Li , Gabor Reizik
IPC分类号： H02M3/156 , G05F1/40
CPC分类号： H02M3/156 , H02M1/44
摘要： A switched noise filter circuit for DC-DC converters which use the instantaneous output voltage to establish the converter's duty ratio. The converter cycles the switching element on and off for time intervals Ton and Toff, respectively. A switching control circuit includes a filter capacitance connected between the feedback node and ground, and a comparator which compares a feedback voltage Vfb with a fixed voltage Vref; at least one of Ton and Toff is a “modulated” interval which is terminated when Vfb crosses Vref due to the discharge of the filter capacitance. A switched noise filter circuit applies an offset voltage to Vfb during at least one of Ton, and Toff, with the offset voltage disconnected from Vfb by the beginning of the modulated interval or shortly thereafter. When the offset voltage is properly applied, the effect of extraneous electromagnetic noise coupled into Vfb is reduced.
摘要翻译：用于DC-DC转换器的开关噪声滤波器电路，其使用瞬时输出电压来建立转换器的占空比。转换器分别对开关元件的开/关时间间隔T＆lt;和＆lt;＆lt;＆lt;＆gt;分开。开关控制电路包括连接在反馈节点和地之间的滤波电容，以及比较器，其将反馈电压V bias与固定电压V ref进行比较; 在T＆lt; / SUB＆gt;和T＆lt; off＆gt;之间的至少一个是“调制的”间隔，当V SUB>由于滤波电容的放电。一个开关噪声滤波器电路在中的至少一个和T _{OFF 中将偏移电压施加到V bias，并且偏移电压断开从调制间隔的开始或之后不久开始，从V 。当适当地施加偏移电压时，耦合到V 的外部电磁噪声的影响减小。}

9. 发明授权

US06229292B1 Voltage regulator compensation circuit and method 有权
标题翻译：稳压补偿电路及方法
公开(公告)号：US06229292B1
公开(公告)日：2001-05-08
申请号：US09557785
申请日：2000-04-25
申请人： Richard Redl , Brian P. Erisman , Jonathan M. Audy , Gabor Reizik
发明人： Richard Redl , Brian P. Erisman , Jonathan M. Audy , Gabor Reizik
IPC分类号： G05F140
CPC分类号： G05F1/565
摘要： A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved with a technique referred to as “optimal voltage positioning”, which keeps the output voltage within the specified boundaries while employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed. The invention can be used with regulators subject to design requirements that specify a minimum time Tmin between load transients, and with those for which no Tmin is specified. When no Tmin is specified, optimal voltage positioning is achieved by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation, which enables the output voltage to remain within specified limits regardless of how quickly load transients occur. Another embodiment enables the power consumption of the device being powered by the regulator to be reduced under certain circumstances, while still employing the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries. The invention is applicable to both switching and linear voltage regulators.
摘要翻译：一种方法和电路使得电压调节器能够使用尽可能小的输出电容器，该电容器允许将稳压器的输出电压保持在规定的边界内以实现负载电流的大的双向步进变化。这是通过称为“最佳电压定位”的技术实现的，其将输出电压保持在指定边界内，同时采用具有最大可能等效串联电阻（ESR）和最小可能电容的组合的输出电容器，其确保负载电流阶跃变化的峰值电压偏差不大于允许的最大值。本发明可以根据规定负载瞬变之间的最小时间Tmin以及规定没有Tmin的设计要求进行调节。当没有指定Tmin时，通过补偿调节器来实现最佳电压定位，以确保峰值偏差发生后的平坦响应，这使得输出电压能够保持在指定的限制内，而不管负载瞬变发生的速度如何。另一个实施例使得在某些情况下能够减小由调节器供电的装置的功耗，同时仍然采用允许调节器的输出电压保持在指定边界内的尽可能小的输出电容器。本发明适用于开关和线性稳压器。

10. 发明授权

US6064187A Voltage regulator compensation circuit and method 有权
标题翻译：稳压补偿电路及方法
公开(公告)号：US6064187A
公开(公告)日：2000-05-16
申请号：US249266
申请日：1999-02-12
申请人： Richard Redl , Brian P. Erisman , Jonathan M. Audy , Gabor Reizik
发明人： Richard Redl , Brian P. Erisman , Jonathan M. Audy , Gabor Reizik
IPC分类号： H02M3/155 , G05F1/565 , G05F1/40
CPC分类号： G05F1/565
摘要： A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved by employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed, and by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation. The invention is applicable to both switching and linear voltage regulators.
摘要翻译：一种方法和电路使得电压调节器能够使用尽可能小的输出电容器，该电容器允许将稳压器的输出电压保持在规定的边界内以实现负载电流的大的双向步进变化。这通过采用具有最大可能等效串联电阻（ESR）和最小可能电容的组合的输出电容器来实现，其确保负载电流中的阶跃变化的峰值电压偏差不大于允许的最大值，并且由补偿调节器，以确保峰值偏差发生后平坦的响应。本发明适用于开关和线性稳压器。

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