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1. 发明授权

US09076735B2 Methods for fabricating integrated circuits using chemical mechanical polishing 有权
标题翻译：使用化学机械抛光制造集成电路的方法
公开(公告)号：US09076735B2
公开(公告)日：2015-07-07
申请号：US14092217
申请日：2013-11-27
申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.
发明人： Lup San Leong , Alan Cing Gie Lim , Ling Wu , Jian Bo Yang
IPC分类号： H01L21/306 , H01L21/02
CPC分类号： H01L21/30625 , H01L21/02532 , H01L21/02595 , H01L21/31053 , H01L21/3212 , H01L27/11526
摘要： Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate. The semiconductor substrate includes a logic device region and a memory array region. The memory array region has a memory device formed on the semiconductor substrate. The method further includes forming a capping layer over the silicon material layer and over the memory device and removing the capping layer from over the memory device in the memory array region using a first chemical mechanical polishing process while leaving at least a first portion of the capping layer in place over the logic device region. Further, the method includes removing the first the silicon material layer from over the memory device in the memory array region using a second chemical mechanical polishing process.
摘要翻译：公开了用于制造集成电路的方法。在示例性实施例中，一种用于制造集成电路的方法包括在半导体衬底上形成硅材料层。半导体衬底包括逻辑器件区域和存储器阵列区域。存储器阵列区域具有形成在半导体衬底上的存储器件。该方法还包括在硅材料层上并在存储器件上方形成覆盖层，并且使用第一化学机械抛光工艺在存储器阵列区域中的存储器件上方移除覆盖层，同时留下封盖的至少第一部分层位于逻辑设备区域上。此外，该方法包括使用第二化学机械抛光工艺从存储器阵列区域中的存储器件的上方去除第一硅材料层。

2. 发明申请

US20150147872A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS USING CHEMICAL MECHANICAL POLISHING 有权
标题翻译：使用化学机械抛光制造集成电路的方法
公开(公告)号：US20150147872A1
公开(公告)日：2015-05-28
申请号：US14092217
申请日：2013-11-27
申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.
发明人： Lup San Leong , Alan Cing Gie Lim , Ling Wu , Jian Bo Yang
IPC分类号： H01L21/306 , H01L21/02
CPC分类号： H01L21/30625 , H01L21/02532 , H01L21/02595 , H01L21/31053 , H01L21/3212 , H01L27/11526
摘要： Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate. The semiconductor substrate includes a logic device region and a memory array region. The memory array region has a memory device formed on the semiconductor substrate. The method further includes forming a capping layer over the silicon material layer and over the memory device and removing the capping layer from over the memory device in the memory array region using a first chemical mechanical polishing process while leaving at least a first portion of the capping layer in place over the logic device region. Further, the method includes removing the first the silicon material layer from over the memory device in the memory array region using a second chemical mechanical polishing process.
摘要翻译：公开了用于制造集成电路的方法。在示例性实施例中，一种用于制造集成电路的方法包括在半导体衬底上形成硅材料层。半导体衬底包括逻辑器件区域和存储器阵列区域。存储器阵列区域具有形成在半导体衬底上的存储器件。该方法还包括在硅材料层上并在存储器件上方形成覆盖层，并且使用第一化学机械抛光工艺在存储器阵列区域中的存储器件上方移除覆盖层，同时留下封盖的至少第一部分层位于逻辑设备区域上。此外，该方法包括使用第二化学机械抛光工艺从存储器阵列区域中的存储器件的上方去除第一硅材料层。

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