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1. 发明授权

US3696895A Fluidic control for motor and brake 失效
标题翻译：电机和制动器的流体控制
公开(公告)号：US3696895A
公开(公告)日：1972-10-10
申请号：US3696895D
申请日：1971-06-24
申请人： GARRETT CORP
发明人： SCHAFFER DAVID J , SUTTON TREVOR G
IPC分类号： F02K1/76 , F16D67/00
CPC分类号： F02K1/76 , Y10T137/2071 , Y10T137/2158 , Y10T477/816
摘要： This system controls the operation of a jet engine thrust reversing mechanism of the type operated by a reversible fluid motor. The control system is of the fluidic character having a first circuit portion for sensing the pressure differential at the inlet and outlet of the fluid motor and consequently the torque being exerted at any particular time and a second circuit portion for providing a pulsating signal with a frequency dependent upon the speed of the fluid motor. These signals are combined and dynamically compensated, the result being applied to a servo which controls the application of fluid pressure to actuators for snubbing and braking the fluid motor. The system is used primarily near the terminations of the deploying and stowing phases of operation of the thrust reversing structure.
摘要翻译：该系统控制由可逆流体马达操作的类型的喷气发动机推力反向机构的操作。控制系统具有流体特性，其具有用于感测流体马达的入口和出口处的压力差的第一回路部分，因此在任何特定时间施加的扭矩和用于提供具有频率的脉动信号的第二电路部分取决于流体马达的速度。这些信号被组合并且被动态地补偿，其结果被应用于伺服机构，该伺服机构控制向致动器施加流体压力以用于缓冲和制动流体马达。该系统主要用于推力反向结构的操作的展开和收起阶段的终端附近。

2. 发明授权

US3589601A Fluidic binary counter 失效
标题翻译：流体二进制计数器
公开(公告)号：US3589601A
公开(公告)日：1971-06-29
申请号：US3589601D
申请日：1969-01-10
申请人： GARRETT CORP
发明人： SCHAFFER DAVID J
IPC分类号： F15C1/12 , G06M1/12
CPC分类号： F15C1/12 , Y10T137/2153 , Y10T137/2158
摘要： The subject fluidic binary counter includes a bistable fluid amplifier with '' 0'' and '' 1'' state output ports, a pair of fluidic AND gates, a pair of fluidic NOT elements, a signal generator, and passages connecting the output port of one AND gate with the set control signal port of the amplifier and the output port of the other AND gate with the reset control signal port. The '' 0'' state output port of the amplifier is connected with the inlet port of one NOT element, while the '' 1'' state output port is connected with the inlet port of the other NOT element. The output ports of the NOT elements are connected, respectively, with one input port of one or the other of the AND gates. The signal line from the signal generator is connected with the remaining input ports of the AND gates and the control ports of the NOT elements. The introduction of a signal from the generator shifts the bistable amplifier from the instant state to the other state where it will remain until the introduction of the next signal.

3. 发明授权

US3881518A Memory circuit for binary counter 失效
标题翻译：二进制计数器的存储电路
公开(公告)号：US3881518A
公开(公告)日：1975-05-06
申请号：US45648674
申请日：1974-04-01
申请人： GARRETT CORP
发明人： SCHAFFER DAVID J
IPC分类号： F15C3/10 , F15C4/00 , F15C7/00 , F15C3/00 , F15C1/08
CPC分类号： F15C3/10 , F15C4/00 , F15C7/00 , Y10T137/2158 , Y10T137/2202
摘要： The subject circuit has a source of fluid pressure, a bistable fluidic amplifier, an indicator moved by fluid impulses from the amplifier when count signals are applied thereto, a plurality of ''''not'''' elements for supplying fluid impulses to the control ports of the bistable amplifier, a ''''one shot'''' element for directing actuating signals to the ''''not'''' elements when the fluid pressure source is re-energized after being shut off, and means, dependent upon the indicating position of the indicator, to block the actuating signal to a certain ''''not'''' element whereby a predetermined control port of the amplifier will be precluded from receiving an impulse and the indicator will remain in the same indicating position it occupied when the power source was shut off until the next succeeding count signal is applied to the bistable amplifier.
摘要翻译：主体电路具有流体压力源，双稳态流体放大器，当计数信号施加到其上时由放大器的流体脉冲移动的指示器，用于向双稳态放大器的控制端口提供流体脉冲的多个“非”元件，当流体压力源在关闭之后被再次通电时，用于将致动信号引导到“非”元件的“单击”元件，以及取决于指示器的指示位置来阻止致动信号的装置某些“不”元件，由此放大器的预定控制端口将被排除接收脉冲，并且当电源被切断时，指示器将保持在与占用的相同的指示位置，直到下一个后续的计数信号被施加到双稳态放大器

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