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1. 发明授权

US11074012B2 Storage device, information processing system, and non-transitory computer-readable storage medium for storing program 有权
公开(公告)号：US11074012B2
公开(公告)日：2021-07-27
申请号：US16368935
申请日：2019-03-29
申请人： FUJITSU LIMITED
发明人： Shinya Kuwamura
IPC分类号： G06F3/06 , G06F12/02
摘要： A storage device includes: a semiconductor memory; and a memory controller coupled to the semiconductor memory and configured to control the semiconductor memory, wherein the memory controller is configured to store information for translating a logical address into a physical address, and execute a dividing process that includes dividing, upon receiving a computational command, the computational command into a plurality of commands based on the information.

2. 发明申请

US20180011663A1 SOLID STATE DRIVE 审中-公开
公开(公告)号：US20180011663A1
公开(公告)日：2018-01-11
申请号：US15640907
申请日：2017-07-03
申请人： Fujitsu Limited
发明人： Shinya Kuwamura
IPC分类号： G06F3/06
摘要： A memory stores data, a memory interface circuit reads the data from the memory, and an arithmetic circuit performs a prescribed arithmetic operation on the data. A host interface circuit outputs an arithmetic request to the arithmetic circuit, and also outputs a reading instruction to the memory via the memory interface circuit, upon receipt of an arithmetic instruction from a host device. The host interface circuit receives, from the arithmetic circuit, an arithmetic result of the prescribed arithmetic operation performed on the data read from the memory via the memory interface circuit, and outputs the arithmetic result to the host device.

3. 发明申请

US20150127318A1 APPARATUS AND METHOD FOR SIMULATING AN OPERATION OF AN OUT-OF-ORDER PROCESSOR 审中-公开
标题翻译：用于模拟无序处理器的操作的装置和方法
公开(公告)号：US20150127318A1
公开(公告)日：2015-05-07
申请号：US14496760
申请日：2014-09-25
申请人： Fujitsu Limited
发明人： David Thach , Shinya Kuwamura , Atsushi Ike
IPC分类号： G06F17/50
CPC分类号： G06F9/455 , G06F2009/45591
摘要： An operation of a processor with out-of-order execution is simulated by a computer configured to access a storage unit storing a specific internal state of the processor. A program executed by the processor is divided into a plurality of blocks. When a target block on which an operation simulation is to be performed is changed from a first block to a second block in the plurality of blocks, the computer determines whether the second block is a block that performs a process according to an exception that has occurred in the first block. When it is determined that the second block is a block that performs the process according to the exception, the computer performs the operation simulation of the second block after changing an internal state of the processor in the operation simulation to the specific internal state stored in the storage unit.
摘要翻译：具有无序执行的处理器的操作由配置为访问存储处理器的特定内部状态的存储单元的计算机来模拟。由处理器执行的程序被分成多个块。当要执行操作模拟的目标块在多个块中从第一块改变为第二块时，计算机确定第二块是否是根据发生的异常执行处理的块在第一个街区。当确定第二块是根据异常执行处理的块时，计算机在将操作模拟中的处理器的内部状态改变为存储在操作模拟中的特定内部状态之后执行第二块的操作模拟存储单元。

4. 发明授权

US11580023B2 Information processing apparatus, computer-readable recording medium having stored therein memory control program, and computer-readable recording medium having stored therein information processing program 有权
公开(公告)号：US11580023B2
公开(公告)日：2023-02-14
申请号：US17189436
申请日：2021-03-02
申请人： FUJITSU LIMITED
发明人： Satoshi Kazama , Shinya Kuwamura
IPC分类号： G06F12/08 , G06F12/0806 , G06F12/0891
摘要： An information processing apparatus including: a first management data storing region that stores a plurality of first links being provided one for each of multiple calculating cores and representing an order of migration of pages of a page group allocated to the calculating core among a plurality of the pages; a second management data storing region that stores a second link being provided for an operating system and managing a plurality of pages selected in accordance with the order of migration among the page group of the plurality of first links as a group of candidate pages to be migrated to the second memory; and a migration processor that migrates data of a page selected from the group of the second link from the first memory to the second memory. With this configuration, occurrence of a spinlock is reduced, so that the load on processor is reduced.

5. 发明授权

US10860225B2 Apparatus and method for routing access based on device load 有权
公开(公告)号：US10860225B2
公开(公告)日：2020-12-08
申请号：US15924927
申请日：2018-03-19
申请人： FUJITSU LIMITED
发明人： Satoshi Kazama , Shinya Kuwamura , Eiji Yoshida , Junji Ogawa
IPC分类号： G06F3/06 , G06F13/16 , G06F13/40 , G06F13/42
摘要： An information processing apparatus includes a memory and a processor and accesses a first storage device and a second storage device wherein an access speed of the second storage device is higher than an access speed of the first storage device. The memory stores information relating to a request in a request from the information processing apparatus to the second storage device. The processor, which is connected to the memory, determines a load on the second storage device based on the information relating to the request.

6. 发明授权

US11627085B2 Non-transitory computer-readable recording medium, service management device, and service management method 有权
公开(公告)号：US11627085B2
公开(公告)日：2023-04-11
申请号：US17522961
申请日：2021-11-10
申请人： FUJITSU LIMITED
发明人： Shinya Kuwamura
IPC分类号： H04L47/125 , H04L47/122 , H04L43/16 , H04L67/1027 , H04L67/1008
摘要： Provided is a non-transitory computer-readable recording medium storing a service management program that causes a computer to execute a process, the process including acquiring a first input load indicating an amount of inputs received by a service at a first point in time, the service being implemented by containers, identifying first numbers of the containers corresponding to the first input load by referring to a storage unit that stores information where a second input load is associated with second numbers of the containers, the second input load indicating an amount of inputs received by the service when a response time of the service is reduced by increasing numbers of the containers to the second numbers of the containers in each of second points in time prior to the first point in time, and increasing the numbers of containers to the first numbers of the containers.

7. 发明授权

US11442668B2 Prioritizing volume accesses in multi-volume storage device based on execution path of a service 有权
公开(公告)号：US11442668B2
公开(公告)日：2022-09-13
申请号：US17351290
申请日：2021-06-18
申请人： FUJITSU LIMITED
发明人： Shinya Kuwamura
IPC分类号： G06F3/06 , G06F16/25 , G06F13/20
摘要： A service management device includes a memory, and a processor coupled to the memory and configured to acquire respective execution times of programs that implement a service, identify a first volume having a largest influence on a response time of the service based on the respective execution times of the programs, where the first volume being any one of volumes of a storage device, and at least one of the programs writing and reading data to and from the storage device, and set a priority of writing and reading of data to and from the first volume higher than priorities of writing and reading of data to and from a remaining volume of the volumes.

8. 发明授权

US10402510B2 Calculating device, calculation method, and calculation program 有权
公开(公告)号：US10402510B2
公开(公告)日：2019-09-03
申请号：US14800277
申请日：2015-07-15
申请人： FUJITSU LIMITED
发明人： Shinya Kuwamura
IPC分类号： G06F17/50
摘要： A calculating device including; a controller configured to execute, for a multicore processor, a first calculation process of calculating a first performance value of a first code executed by the first core and including a first access instruction by executing a first simulation, a second calculation process of calculating a second performance value of a second code executed by the second core and including a second access instruction by executing a second simulation, a synchronization process of synchronizing the first and the second simulations when the first access instruction is executed in the first simulation, and a correction process of correcting the first performance value, by executing a third simulation to simulate an operation of the cache memory when the first core accesses the main memory through the cache memory in accordance with the first access instruction, after the synchronization by the synchronization process.

9. 发明授权

US09626201B2 Processor emulation device and storage medium 有权
公开(公告)号：US09626201B2
公开(公告)日：2017-04-18
申请号：US13733993
申请日：2013-01-04
申请人： FUJITSU LIMITED
发明人： Shinya Kuwamura
IPC分类号： G06F9/455
CPC分类号： G06F9/455 , G06F9/45558 , G06F2009/45583
摘要： A processor emulation device comprising includes an address converter converting a virtual address in a guest environment into a physical address in a host environment, wherein a correspondence between the virtual address and a physical address in the guest environment is different from a correspondence between a virtual address and the physical address in the host environment controlled by a host OS; and an exception handling processing part, in a case where a page attribute obtained in converting the virtual address in the guest environment into the physical address in the guest environment is an attribute specific to the guest environment and absent in the host environment, performing an exception handling process based on the attribute specific to the guest environment.

10. 发明授权

US11029892B2 Memory control apparatus and memory control method for swapping data based on data characteristics 有权
公开(公告)号：US11029892B2
公开(公告)日：2021-06-08
申请号：US16395305
申请日：2019-04-26
申请人： FUJITSU LIMITED
发明人： Satoshi Kazama , Shinya Kuwamura
IPC分类号： G06F12/00 , G06F3/06 , G06F13/00 , G06F13/28
摘要： A memory control apparatus includes a first memory, a second memory, a third memory, and a processor configured to add, to management information, first identification information and information indicating a position where first data is stored when the first data is stored in the first memory, add, to the management information, the first identification information and information indicating a position where second data is stored when the second data is stored in the second memory, add, to the management information, second identification information and information indicating a position where third data is stored when the third data is stored in the third memory, determine which one of the first identification information and the second identification information is associated with fourth data, and perform retrieval of the fourth data from the first memory or the second memory in accordance with information indicating a position where the fourth data is stored.

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