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1. 发明申请

US20140094020A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20140094020A1
公开(公告)日：2014-04-03
申请号：US14096477
申请日：2013-12-04
申请人： FUJI ELECTRIC CO., LTD.
发明人： Hiroki WAKIMOTO , Kenichi Iguchi , Koh Yoshikawa , Tsunehiro Nakajima , Shunsuke Tanaka , Masaaki Ogino
IPC分类号： H01L21/78 , H01L21/308
CPC分类号： H01L21/308 , H01L21/302 , H01L21/78 , H01L29/06
摘要： Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
摘要翻译：本发明的一些实施例涉及能够防止电特性劣化的半导体器件和半导体器件的制造方法。 p型集电极区域设置在n型漂移区域的背面的表面层上。在元件的末端提供了用于获得反向阻挡能力的p +型隔离层。此外，设置从n型漂移区的背面向p +型隔离层延伸的凹部。提供p型区域并且电连接到p +型隔离层。提供p +型隔离层，以便包括具有作为一侧的凹部的底部和侧壁之间的边界的解理面。

2. 发明申请

US20180076290A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20180076290A1
公开(公告)日：2018-03-15
申请号：US15665845
申请日：2017-08-01
申请人： Fuji Electric Co., Ltd.
发明人： Ryohei TAKAYANAGI , Hiroki WAKIMOTO
IPC分类号： H01L29/16 , H01L29/06 , H01L29/36 , H01L29/417 , H01L29/32 , H01L29/78 , H01L21/02 , H01L21/04 , H01L29/66
CPC分类号： H01L29/1608 , H01L21/02378 , H01L21/02428 , H01L21/02433 , H01L21/02529 , H01L21/02634 , H01L21/046 , H01L21/0475 , H01L29/0615 , H01L29/0619 , H01L29/0661 , H01L29/0688 , H01L29/0696 , H01L29/0865 , H01L29/0882 , H01L29/1095 , H01L29/167 , H01L29/32 , H01L29/36 , H01L29/41741 , H01L29/66068 , H01L29/66712 , H01L29/7395 , H01L29/7802 , H01L29/7804 , H01L29/7811 , H01L29/7813 , H01L29/8611 , H01L29/872
摘要： An embodiment of a silicon carbide semiconductor device includes one or more inner cells each having a MOSFET and one or more outer peripheral cells that does not have a MOSFET structure, and the area (surface area) of the p+ contact region of each of the outermost peripheral cells is less than the surface area of an p+ contact region of each of the inner cells, for example, so that a unit total resistance of p+ contact regions of the outermost peripheral cells, as measured in a depth direction of the semiconductor substrate with respect to a unit area in a surface of the semiconductor substrate, is greater than a unit total resistance of the p+ contact regions of the inner cells, as measured in the depth direction of the semiconductor substrate with respect to the unit area in the surface of the semiconductor substrate.

3. 发明申请

US20170077217A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20170077217A1
公开(公告)日：2017-03-16
申请号：US15257853
申请日：2016-09-06
申请人： FUJI ELECTRIC CO., LTD.
发明人： Eri OGAWA , Hiroki WAKIMOTO , Misaki TAKAHASHI , Yuichi ONOZAWA
IPC分类号： H01L29/06 , H01L29/40 , H01L29/739 , H01L29/08
CPC分类号： H01L29/0615 , H01L29/0619 , H01L29/08 , H01L29/0834 , H01L29/1095 , H01L29/402 , H01L29/7397 , H01L29/7805 , H01L29/7811
摘要： To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having a first conduction type; a first region having a second conduction type that is formed in a front surface of the semiconductor substrate; a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region; a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region; an insulating film that covers a portion of the second region and the third region; and an electrode connected to the second region and the first region that are not covered by the insulating film.
摘要翻译：为了提高反向恢复期间半导体器件的耐受能力，提供了包括具有第一导电类型的半导体衬底的半导体器件; 具有形成在所述半导体衬底的前表面中的第二导电类型的第一区域; 具有与所述半导体衬底的前表面中的所述第一区域相邻并且具有比所述第一区域更高的浓度的第二导电类型的第二区域; 具有与所述半导体衬底的前表面中的所述第二区域相邻并且具有比所述第二区域更高的浓度的第二导电类型的第三区域; 覆盖所述第二区域和所述第三区域的一部分的绝缘膜; 以及连接到未被绝缘膜覆盖的第二区域和第一区域的电极。

4. 发明申请

US20180061935A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 审中-公开
公开(公告)号：US20180061935A1
公开(公告)日：2018-03-01
申请号：US15791440
申请日：2017-10-24
申请人： FUJI ELECTRIC CO., LTD.
发明人： Hiroki WAKIMOTO , Yuichi ONOZAWA , Takahiro TAMURA , Eri OGAWA
IPC分类号： H01L29/06 , H01L29/861 , H01L21/265 , H01L21/324 , H01L29/66
CPC分类号： H01L29/0615 , H01L21/265 , H01L21/26506 , H01L21/26513 , H01L21/324 , H01L29/167 , H01L29/32 , H01L29/36 , H01L29/66121 , H01L29/66136 , H01L29/861 , H01L29/87
摘要： To prevent an intermediate region from contacting a cathode electrode even if a cathode region is partially defective. There is provided a semiconductor device with a semiconductor substrate that has a field stop region where first impurities of a first conduction type are implanted, an intermediate region that is formed on a back surface side of the field stop region and where second impurities of a second conduction type are implanted, and a cathode region of the first conduction type that is formed on a back surface side of the intermediate region. In a back surface of the semiconductor substrate, a concentration of the first impurities is higher than a concentration of the second impurities.

5. 发明申请

US20160141364A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20160141364A1
公开(公告)日：2016-05-19
申请号：US14932889
申请日：2015-11-04
申请人： FUJI ELECTRIC CO., LTD.
发明人： Toru MURAMATSU , Hiroki WAKIMOTO
IPC分类号： H01L29/08 , H01L29/66 , H01L21/304 , H01L29/10 , H01L21/225 , H01L29/739 , H01L29/06
CPC分类号： H01L29/1095 , H01L29/0834 , H01L29/66333 , H01L29/7393 , H01L29/7395 , H03K17/567
摘要： Provided is a semiconductor device comprising: a first conductivity type base layer having a MOS gate structure formed on its front surface side; a second conductivity type first collector layer formed on a rear surface side of the base layer; a second conductivity type second collector layer formed on a rear surface side of the first collector layer with a material the same with that of the base layer, the second collector layer formed to be thinner than the first collector layer and having a higher impurity concentration than that of the first collector layer; a collector electrode formed on a rear surface side of the second collector layer; and a second conductivity type separation layer surrounding the MOS gate structure on a front surface side of the base layer and formed from a front surface of the base layer to a front surface of the first collector layer.
摘要翻译：提供一种半导体器件，包括：在其前表面侧形成有MOS栅极结构的第一导电型基极层; 形成在基层的背面侧的第二导电型第一集电体层; 第二导电型第二集电体层，其形成在第一集电体层的背面侧，其材料与基底层的材料相同，第二集电体层形成为比第一集电体层薄，并且具有比第一个收集层的; 形成在所述第二集电体层的背面侧的集电极; 以及第二导电型分离层，其围绕所述基底层的前表面侧的所述MOS栅极结构，并且从所述基底层的前表面到所述第一集电体层的前表面形成。

6. 发明申请

US20140361312A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20140361312A1
公开(公告)日：2014-12-11
申请号：US14470429
申请日：2014-08-27
申请人： FUJI ELECTRIC CO., LTD.
发明人： Koh YOSHIKAWA , Hiroki WAKIMOTO , Masaaki OGINO
IPC分类号： H01L29/06 , H01L29/20
CPC分类号： H01L29/0619 , H01L29/0615 , H01L29/0638 , H01L29/0646 , H01L29/0653 , H01L29/0657 , H01L29/0661 , H01L29/0834 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/41766 , H01L29/47 , H01L29/475 , H01L29/66068 , H01L29/66333 , H01L29/7395 , H01L29/7396
摘要： In aspects of the invention, SiC reverse blocking MOSFET includes an active region including a MOS gate structure and a breakdown voltage structure portion surrounding the outer circumference of the active region, which are provided on the surface side of a SiC-n− drift layer that is grown on one main surface of a p+ SiC substrate. A p-type isolation region is provided on the side surface of the SiC-n− drift layer so as to surround the outer circumference of the breakdown voltage structure portion and to extend from the front surface of the SiC-n− drift layer to the p+ SiC substrate. A concave portion which reaches the SiC-n− drift layer through the p+ SiC substrate and has a bottom area corresponding to the area of the active region is provided in a region of the other main surface of the p+ SiC substrate which is opposite to the active region.
摘要翻译：在本发明的方面中，SiC反向阻挡MOSFET包括设置在SiC-n漂移层的表面侧上的包括MOS栅极结构和围绕有源区的外周的击穿电压结构部分的有源区，在p + SiC衬底的一个主表面上生长。在SiC-n漂移层的侧表面上设置p型隔离区域，以围绕击穿电压结构部分的外周并且从SiC-n-漂移层的前表面延伸到 p + SiC衬底。通过p + SiC衬底到达SiC-n漂移层并且具有对应于有源区域的面积的底部区域的凹部设置在p + SiC衬底的另一个主表面的与活跃区域。

7. 发明申请

US20140061672A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140061672A1
公开(公告)日：2014-03-06
申请号：US13964219
申请日：2013-08-12
申请人： Fuji Electric Co., Ltd.
发明人： Hiroki WAKIMOTO , Haruo NAKAZAWA , Yasushi MIYASAKA
IPC分类号： H01L29/16 , H01L29/78 , H01L29/20
CPC分类号： H01L29/1608 , H01L29/0619 , H01L29/0661 , H01L29/2003 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/41766 , H01L29/47 , H01L29/475 , H01L29/7395 , H01L29/7827
摘要： A semiconductor device includes an active region in which current flows when the semiconductor device is in an on state and a breakdown voltage structure portion which surrounds the active region. In the active region, a MOS gate structure includes, a p well region, an n+ source region, a gate electrode, and a source electrode is provided on the front surface of a semiconductor substrate. A drain electrode which comes into contact with an n− drift region is provided from the rear surface to the side surface of the semiconductor substrate. The drain electrode forms a Schottky contact with the n− drift region which is the semiconductor substrate. In the breakdown voltage structure portion, a leakage current reducing layer reduces leakage current from the outer circumferential edge of the semiconductor substrate and is provided at least at the outer circumferential edge of the semiconductor substrate.
摘要翻译：半导体器件包括当半导体器件处于导通状态时电流流动的有源区和围绕有源区的击穿电压结构部分。在有源区中，MOS栅结构包括p阱区，n +源极区，栅电极和源电极设置在半导体衬底的前表面上。从半导体衬底的背面到侧面设置与n-漂移区接触的漏电极。漏电极与作为半导体衬底的n-漂移区形成肖特基接触。在击穿电压结构部分中，泄漏电流降低层减小了从半导体衬底的外周边缘的漏电流，并且至少设置在半导体衬底的外周边缘处。

8. 发明申请

US20130092979A1 SEMICONDUCTOR DEVICE WITH AN ELECTRODE INCLUDING AN ALUMINUM-SILICON FILM 有权
标题翻译：具有包括铝硅膜的电极的半导体器件
公开(公告)号：US20130092979A1
公开(公告)日：2013-04-18
申请号：US13674630
申请日：2012-11-12
申请人： FUJI ELECTRIC CO., LTD.
发明人： Kenichi KAZAMA , Tsunehiro NAKAJIMA , Koji SASAKI , Akio SHIMIZU , Takashi HAYASHI , Hiroki WAKIMOTO
IPC分类号： H01L29/739
CPC分类号： H01L29/7393 , H01L29/0834 , H01L29/41725 , H01L29/456 , H01L29/66333 , H01L29/7395
摘要： A semiconductor device, including a silicon substrate having a first major surface and a second major surface, a front surface device structure formed in a region of the first major surface, and a rear electrode formed in a region of the second major surface. The rear electrode includes, as a first layer thereof, an aluminum silicon film that is formed by evaporating or sputtering aluminum-silicon onto the second major surface, the aluminum silicon film having a silicon concentration of at least 2 percent by weight and a thickness of less than 0.3 μm.
摘要翻译：一种半导体器件，包括具有第一主表面和第二主表面的硅衬底，形成在第一主表面的区域中的前表面器件结构和形成在第二主表面的区域中的后电极。后电极包括通过将铝硅蒸发或溅射到第二主表面上而形成的铝硅膜，所述铝硅膜的硅浓度至少为2重量％，厚度为小于0.3毫米。

9. 发明申请

US20210159317A1 SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20210159317A1
公开(公告)日：2021-05-27
申请号：US17168124
申请日：2021-02-04
申请人： FUJI ELECTRIC CO., LTD.
发明人： Hiroki WAKIMOTO , Hiroshi TAKISHITA , Takashi YOSHIMURA , Takahiro TAMURA , Yuichi ONOZAWA
IPC分类号： H01L29/36 , H01L29/66 , H01L29/32 , H01L29/861 , H01L21/22 , H01L21/265 , H01L21/324 , H01L29/06 , H01L29/739
摘要： A p-type semiconductor region is formed in a front surface side of an n-type semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donors in the FS region include first, second, third and fourth peaks in order from a front surface to the rear surface. Each of the peaks has a peak maximum point, and peak end points formed at both sides of the peak maximum point. The peak maximum points of the first and second peaks are higher than the peak maximum point of the third peak. The peak maximum point of the third peak is lower than the peak maximum point of the fourth peak.

10. 发明申请

US20190288078A1 SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20190288078A1
公开(公告)日：2019-09-19
申请号：US16430444
申请日：2019-06-04
申请人： FUJI ELECTRIC CO., LTD.
发明人： Hiroki WAKIMOTO , Hiroshi TAKISHITA , Takashi YOSHIMURA , Takahiro TAMURA , Yuichi ONOZAWA
IPC分类号： H01L29/36 , H01L29/739 , H01L29/66 , H01L29/06 , H01L29/861 , H01L29/32 , H01L21/324 , H01L21/22 , H01L21/265
摘要： A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.

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