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    • 1. 发明授权
    • Power supply apparatus with low standby power consumption
    • 电源设备具有低待机功耗
    • US09160227B2
    • 2015-10-13
    • US13715576
    • 2012-12-14
    • Fu-Chuan Chen
    • Fu-Chuan Chen
    • H02M1/00H02M1/42
    • H02M1/4225H02M2001/0032H02M2001/007Y02B70/126Y02B70/16Y02P80/112
    • An electronic apparatus is removed from a power supply apparatus and that can be certified by detecting a secondary-side transformer coil by a no-load detecting unit. The no-load detecting unit is configured to turn off an output switch unit and a power factor correction and pulse width modulation controller. An intermittent driving unit is configured to drive a start unit once a pre-determined time. The start unit is configured to drive the power factor correction and pulse width modulation controller. A load detecting unit is configured to detect that the electronic apparatus is connected to the power supply apparatus. The load detecting unit is configured to drive the intermittent driving unit. The intermittent driving unit is configured to drive the start unit. The start unit is configured to drive the power factor correction and pulse width modulation controller.
    • 从电源装置移除电子装置,可以通过空载检测装置检测次级侧变压器线圈来进行认证。 空载检测单元被配置为关闭输出开关单元和功率因数校正和脉冲宽度调制控制器。 间歇驱动单元被配置为在预定时间之后驱动起动单元。 启动单元配置为驱动功率因数校正和脉宽调制控制器。 负载检测单元被配置为检测电子设备连接到电源设备。 负载检测单元被配置为驱动间歇驱动单元。 间歇驱动单元被配置为驱动起动单元。 启动单元配置为驱动功率因数校正和脉宽调制控制器。
    • 4. 发明授权
    • System and method for detecting a work status of a computer system
    • 用于检测计算机系统的工作状态的系统和方法
    • US07779310B2
    • 2010-08-17
    • US11946849
    • 2007-11-29
    • Cong-Feng WeiPo-Chang WangFu-Chuan ChenWei-Yuan Chen
    • Cong-Feng WeiPo-Chang WangFu-Chuan ChenWei-Yuan Chen
    • G06F11/00
    • G06F11/0757
    • A system for detecting a work status of a computer system is provided. The system includes a super input/output (Super I/O) chipset, a complex programmable logic device (CPLD), a South Bridge chipset and a device driver. The device driver is configured for driving the Super I/O chipset to generate and send a start signal to the CPLD, and is further configured for driving the Super I/O chipset to periodically generate and send a test signal to the CPLD. The CPLD is configured for receiving the start signal and triggering a clock to start timing from an initial time, monitoring whether a predetermined amount of test signals have been received in a predetermined time, and is further configured for sending a reboot signal to the South Bridge chipset when the predetermined amount of test signals have not been received in the predetermined time. The South Bridge chipset is configured for rebooting the computer system when receiving the reboot signal. A related method is also provided.
    • 提供了一种用于检测计算机系统的工作状态的系统。 该系统包括超级输入/输出(超级I / O)芯片组,复杂可编程逻辑器件(CPLD),南桥芯片组和器件驱动器。 设备驱动器被配置为驱动超级I / O芯片组以产生并向CPLD发送启动信号,并且还被配置为用于驱动超级I / O芯片组周期性地产生并向CPLD发送测试信号。 CPLD被配置为接收起始信号并触发时钟从初始时间开始定时,监视在预定时间内是否已经接收到预定量的测试信号,并且还被配置为向南桥发送重启信号 当在预定时间内未接收到预定量的测试信号时芯片组。 南桥芯片组被配置为在接收到重新启动信号时重新启动计算机系统。 还提供了相关的方法。