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1. 发明申请

US20120005643A1 System and Method for Placing Integrated Circuit Functional Blocks According to Dataflow Width 审中-公开
标题翻译：根据数据流宽度放置集成电路功能块的系统和方法
公开(公告)号：US20120005643A1
公开(公告)日：2012-01-05
申请号：US12827027
申请日：2010-06-30
申请人： Friedrich Schroeder , Alexander Woerner , Stefan Bonsels , Tobias Werner
发明人： Friedrich Schroeder , Alexander Woerner , Stefan Bonsels , Tobias Werner
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： Macroblock placement for an integrated circuit register-transfer level design is enhanced by tagging blocks having a set of functions as usage element definitions that have a minimum input signal width, such as tags added to a netlist of the design. Tagged blocks aid preferred and regular placement of library cells that are morphed to adapt for reduced congestion and improved utilization.
摘要翻译：通过将具有一组功能的块标记为具有最小输入信号宽度的使用元素定义（例如添加到设计的网表的标签）来增强用于集成电路寄存器传输级设计的宏块放置。标记的块帮助优化和定期放置图书馆细胞，以便适应减少的拥塞和改善利用。

2. 发明授权

US08471624B2 Method for controlling the supply voltage for an integrated circuit and an apparatus with a voltage regulation module and an integrated circuit 失效
标题翻译：用于控制集成电路的电源电压的方法和具有电压调节模块和集成电路的装置
公开(公告)号：US08471624B2
公开(公告)日：2013-06-25
申请号：US13037343
申请日：2011-02-28
申请人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
发明人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
IPC分类号： G05F3/02
CPC分类号： G05F1/56
摘要： The present invention relates to a method for controlling the supply voltage for an integrated circuit, which is connected to a voltage regulation module via a sense line, a voltage supply line and a bus wherein the supply voltage is provided by the voltage regulation module (10) via the voltage supply line. The supply voltage is composed of a reference voltage and a number of additional voltage levels. The reference voltage is defined by a voltage source and controlled by the integrated circuit via the bus, and the number of additional voltage levels is determined by the integrated circuit and send to the voltage regulation module via the sense line. Further the present invention relates to a corresponding apparatus with a voltage regulation module and an integrated circuit.
摘要翻译：本发明涉及一种用于控制集成电路的电源电压的方法，该集成电路通过感测线，电压供应线和总线连接到电压调节模块，其中电源电压由电压调节模块（10 ）通过电源线。电源电压由参考电压和多个附加电压电平组成。参考电压由电压源定义，并通过总线由集成电路控制，附加电压电平的数量由集成电路确定，并通过感测线发送到电压调节模块。此外，本发明涉及具有电压调节模块和集成电路的相应装置。

3. 发明申请

US20120218031A1 METHOD FOR CONTROLLING THE SUPPLY VOLTAGE FOR AN INTEGRATED CIRCUIT AND AN APPARATUS WITH A VOLTAGE REGULATION MODULE AND AN INTEGRATED CIRCUIT 失效
标题翻译：用于控制集成电路的电源电压的方法和具有电压调节模块和集成电路的装置
公开(公告)号：US20120218031A1
公开(公告)日：2012-08-30
申请号：US13037343
申请日：2011-02-28
申请人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
发明人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
IPC分类号： G05F1/10
CPC分类号： G05F1/56
摘要： The present invention relates to a method for controlling the supply voltage for an integrated circuit, which is connected to a voltage regulation module via a sense line, a voltage supply line and a bus wherein the supply voltage is provided by the voltage regulation module (10) via the voltage supply line. The supply voltage is composed of a reference voltage and a number of additional voltage levels. The reference voltage is defined by a voltage source and controlled by the integrated circuit via the bus, and the number of additional voltage levels is determined by the integrated circuit and send to the voltage regulation module via the sense line. Further the present invention relates to a corresponding apparatus with a voltage regulation module and an integrated circuit.
摘要翻译：本发明涉及一种用于控制集成电路的电源电压的方法，该集成电路通过感测线，电压供应线和总线连接到电压调节模块，其中电源电压由电压调节模块（10 ）通过电源线。电源电压由参考电压和多个附加电压电平组成。参考电压由电压源定义，并通过总线由集成电路控制，附加电压电平的数量由集成电路确定，并通过感测线发送到电压调节模块。此外，本发明涉及具有电压调节模块和集成电路的相应装置。

4. 发明授权

US07795914B2 Circuit design methodology to reduce leakage power 失效
标题翻译：电路设计方法，以减少漏电功率
公开(公告)号：US07795914B2
公开(公告)日：2010-09-14
申请号：US12262255
申请日：2008-10-31
申请人： Tobias Gemmeke , Friedrich Schroeder , Stefan Bonsels , Dieter Wendel
发明人： Tobias Gemmeke , Friedrich Schroeder , Stefan Bonsels , Dieter Wendel
IPC分类号： H03K19/00 , H03K19/02
CPC分类号： H03K19/09429 , H03K19/0016
摘要： A three stage circuit according to the invention comprises a data input, a data output, a control input, two voltage supply inputs. The first stage is electrically connected to the data input and control input and is defined by a combinatorial circuitry with two outputs. The second stage is defined by at least two transistors connected in series between the two voltage supply inputs with their inputs electrically connected to the respective outputs of the first stage and with a common output such that in connection with the first stage they operate as a tri-state gate. The third stage of that three stage circuit is electrically connected to the control input and the common output of the second stage. The three stage circuit is switched to a low leakage state by a control signal feed via the control input and setting the two transistors in their off state resulting in a second stage with a floating common output filtered by the third stage via the control signal actively driven the data output to a specific logic value.
摘要翻译：根据本发明的三级电路包括数据输入，数据输出，控制输入，两个电压输入。第一级电连接到数据输入和控制输入，并由具有两个输出的组合电路定义。第二级由两个电压源输入之间串联连接的至少两个晶体管形成，它们的输入电连接到第一级的相应输出，并具有共同的输出，使得与第一级连接时，它们以三状态门该三级电路的第三级电连接到第二级的控制输入和公共输出端。三级电路经由控制输入端通过控制信号馈电切换到低泄漏状态，并将两个晶体管设置为关闭状态，从而产生第二级，其中第一级通过主动驱动的控制信号由第三级滤波的浮动公共输出数据输出到一个特定的逻辑值。

5. 发明申请

US20090115504A1 CIRCUIT DESIGN METHODOLOGY TO REDUCE LEAKAGE POWER 失效
标题翻译：电路设计方法降低漏电功率
公开(公告)号：US20090115504A1
公开(公告)日：2009-05-07
申请号：US12262255
申请日：2008-10-31
申请人： Tobias Gemmeke , Friedrich Schroeder , Stefan Bonsels , Dieter Wendel
发明人： Tobias Gemmeke , Friedrich Schroeder , Stefan Bonsels , Dieter Wendel
IPC分类号： H01L25/00
CPC分类号： H03K19/09429 , H03K19/0016
摘要： A three stage circuit according to the invention comprises a data input, a data output, a control input, two voltage supply inputs. The first stage is electrically connected to the data input and control input and is defined by a combinatorial circuitry with two outputs. The second stage is defined by at least two transistors connected in series between the two voltage supply inputs with their inputs electrically connected to the respective outputs of the first stage and with a common output such that in connection with the first stage they operate as a tri-state gate. The third stage of that three stage circuit is electrically connected to the control input and the common output of the second stage. The three stage circuit is switched to a low leakage state by a control signal feed via the control input and setting the two transistors in their off state resulting in a second stage with a floating common output filtered by the third stage via the control signal actively driven the data output to a specific logic value.
摘要翻译：根据本发明的三级电路包括数据输入，数据输出，控制输入，两个电压输入。第一级电连接到数据输入和控制输入，并由具有两个输出的组合电路定义。第二级由两个电压源输入之间串联连接的至少两个晶体管形成，它们的输入电连接到第一级的相应输出，并具有共同的输出，使得与第一级连接时，它们以三状态门该三级电路的第三级电连接到第二级的控制输入和公共输出端。三级电路经由控制输入端通过控制信号馈电切换到低泄漏状态，并将两个晶体管设置为关闭状态，从而产生第二级，其中第一级通过主动驱动的控制信号由第三级滤波的浮动公共输出数据输出到一个特定的逻辑值。

6. 发明申请

US20130113545A9 METHOD FOR CONTROLLING THE SUPPLY VOLTAGE FOR AN INTEGRATED CIRCUIT AND AN APPARATUS WITH A VOLTAGE REGULATION MODULE AND AN INTEGRATED CIRCUIT 失效
标题翻译：用于控制集成电路的电源电压的方法和具有电压调节模块和集成电路的装置
公开(公告)号：US20130113545A9
公开(公告)日：2013-05-09
申请号：US13037343
申请日：2011-02-28
申请人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
发明人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
IPC分类号： G05F1/10
CPC分类号： G05F1/56
摘要： The present invention relates to a method for controlling the supply voltage for an integrated circuit, which is connected to a voltage regulation module via a sense line, a voltage supply line and a bus wherein the supply voltage is provided by the voltage regulation module (10) via the voltage supply line. The supply voltage is composed of a reference voltage and a number of additional voltage levels. The reference voltage is defined by a voltage source and controlled by the integrated circuit via the bus, and the number of additional voltage levels is determined by the integrated circuit and send to the voltage regulation module via the sense line. Further the present invention relates to a corresponding apparatus with a voltage regulation module and an integrated circuit.
摘要翻译：本发明涉及一种用于控制集成电路的电源电压的方法，该集成电路通过感测线，电压供应线和总线连接到电压调节模块，其中电源电压由电压调节模块（10 ）通过电源线。电源电压由参考电压和多个附加电压电平组成。参考电压由电压源定义，并通过总线由集成电路控制，附加电压电平的数量由集成电路确定，并通过感测线发送到电压调节模块。此外，本发明涉及具有电压调节模块和集成电路的相应装置。

7. 发明申请

US20100013446A1 METHOD FOR CONTROLLING THE SUPPLY VOLTAGE FOR AN INTEGRATED CIRCUIT AND AN APPARATUS WITH A VOLTAGE REGULATION MODULE AND AN INTEGRATED CIRCUIT 审中-公开
标题翻译：用于控制集成电路的电源电压的方法和具有电压调节模块和集成电路的装置
公开(公告)号：US20100013446A1
公开(公告)日：2010-01-21
申请号：US12174902
申请日：2008-07-17
申请人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
发明人： Stefan Bonsels , Cedric Lichtenau , Antje Mueller , Thomas Pflueger , Friedrich Schroeder
IPC分类号： G05F1/10
CPC分类号： G05F1/575
摘要： The present invention relates to a method for controlling the supply voltage for an integrated circuit, which is connected to a voltage regulation module via a sense line, a voltage supply line and a bus wherein the supply voltage is provided by the voltage regulation module (10) via the voltage supply line. The supply voltage is composed of a reference voltage and a number of additional voltage levels. The reference voltage is defined by a voltage source and controlled by the integrated circuit via the bus, and the number of additional voltage levels is determined by the integrated circuit and send to the voltage regulation module via the sense line. Further the present invention relates to a corresponding apparatus with a voltage regulation module and an integrated circuit.
摘要翻译：本发明涉及一种用于控制集成电路的电源电压的方法，该集成电路通过感测线，电压供应线和总线连接到电压调节模块，其中电源电压由电压调节模块（10 ）通过电源线。电源电压由参考电压和多个附加电压电平组成。参考电压由电压源定义，并通过总线由集成电路控制，附加电压电平的数量由集成电路确定，并通过感测线发送到电压调节模块。此外，本发明涉及具有电压调节模块和集成电路的相应装置。

8. 发明申请

US20130227250A1 SIMD ACCELERATOR FOR DATA COMPARISON 审中-公开
标题翻译：用于数据比较的SIMD加速器
公开(公告)号：US20130227250A1
公开(公告)日：2013-08-29
申请号：US13405021
申请日：2012-02-24
申请人： Wilhelm Haller , Ulrich Krauch , Kurt Lind , Friedrich Schroeder , Alexander Woerner
发明人： Wilhelm Haller , Ulrich Krauch , Kurt Lind , Friedrich Schroeder , Alexander Woerner
IPC分类号： G06F9/30 , G06F9/345 , G06F9/302
CPC分类号： G06F9/30021 , G06F9/30018 , G06F9/3887
摘要： Some example embodiments include an apparatus for comparing a first operand to a second operand. The apparatus includes a SIMD accelerator configured to compare first multiple parts (e.g., bytes) of first operand to second multiple parts (e.g., bytes) of the second operand. The SIMD accelerator includes a ones' complement subtraction logic and a twos' complement logic configured to perform logic operations on the multiple parts of the first operand and the multiple parts of the second operand to generate a group of carry out and propagate data across bits of the multiple parts. At least a portion of the group of carry out and propagate data is reused in the group of logic operations.
摘要翻译：一些示例性实施例包括用于将第一操作数与第二操作数进行比较的装置。该装置包括配置为将第一操作数的第一多个部分（例如，字节）与第二操作数的第二多个部分（例如，字节）进行比较的SIMD加速器。 SIMD加速器包括一个补码减法逻辑和二进制补码逻辑，其被配置为对第一操作数的多个部分和第二操作数的多个部分执行逻辑运算，以生成一组进位和传播数据多部分。该组执行和传播数据的至少一部分在逻辑操作组中被重用。

9. 发明授权

US08316335B2 Multistage, hybrid synthesis processing facilitating integrated circuit layout 有权
标题翻译：多级混合合成处理便于集成电路布局
公开(公告)号：US08316335B2
公开(公告)日：2012-11-20
申请号：US12963677
申请日：2010-12-09
申请人： Harry Barowski , Harold Mielich , Friedrich Schroeder , Alexander Woerner
发明人： Harry Barowski , Harold Mielich , Friedrich Schroeder , Alexander Woerner
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F2217/84
摘要： Multistage synthesis of hardware function operation descriptions is provided, which facilitates placement of logic cells in an integrated circuit design layout, and includes: parsing hardware function operation descriptions of a circuit to identify multiple instantiations of a type of logic function; performing, without shape restriction, a first synthesis on each logic function type identified as having multiple instantiations and producing an irregular-shaped logic unit layout for that logic function type; establishing an irregular-shaped blocking mask corresponding to a respective irregular-shaped logic unit layout produced by the first synthesis; creating a partial circuit layout by placing each irregular-shaped blocking mask multiple times corresponding to the multiple instantiations of the respective logic function type; and performing, employing the partial circuit layout, a second synthesis on the balance of the hardware function operation descriptions of the circuit outside the multiple instantiations of the logic function type.
摘要翻译：提供了硬件功能操作描述的多级合成，这有助于逻辑单元在集成电路设计布局中的布置，并且包括：解析电路的硬件功能操作描述以识别一种逻辑功能的多个实例; 在没有形状限制的情况下执行被识别为具有多个实例的每个逻辑功能类型的第一合成并且产生用于该逻辑功能类型的不规则形状的逻辑单元布局; 建立对应于由第一合成产生的相应的不规则形状的逻辑单元布局的不规则形状的阻挡掩模; 通过将各个不规则形状的阻挡掩模多次对应于相应逻辑功能类型的多个实例来产生部分电路布局; 并且在逻辑功能类型的多个实例之外的电路的硬件功能操作描述的平衡上执行采用部分电路布局的第二合成。

10. 发明授权

US5731963A Housing for a radio device having a thin electrically conductive film applied to an exterior surface thereof 失效
标题翻译：用于具有施加到其外表面的薄导电膜的无线电设备的外壳
公开(公告)号：US5731963A
公开(公告)日：1998-03-24
申请号：US616631
申请日：1996-03-15
申请人： Reinhold Heiss , Friedrich Schroeder
发明人： Reinhold Heiss , Friedrich Schroeder
IPC分类号： H04B1/3827 , H04M1/02 , H04B1/03
CPC分类号： H04B1/3833 , H04B1/3838 , H04M1/0202 , Y10S174/34
摘要： A housing is provided for a radio device, such as a portable cellular telephone, in a housing arrangement which includes an integral electromagnetic shield. A thin conductive film is applied to an interior or exterior surface of one or more shell-type housing parts. This thin film may be applied during an injection molding process to form the shell-type parts. The shell-type parts are shaped to define a cavity for encasing electronic components of the radio device, and for securably receiving an associated circuit board. The thin film is disposed to extend over a supporting edge of the corresponding housing part so that circuit board grounding surfaces are in low-resistance contact with the shielding film. The film thereby provides the housing with an integrated shielding function against electromagnetic radiation.
摘要翻译：在包括整体电磁屏蔽的外壳装置中，为诸如便携式蜂窝电话的无线电设备提供外壳。将薄导电膜施加到一个或多个壳型壳体部件的内表面或外表面。这种薄膜可以在注射成型过程中施加以形成壳型部件。壳型部件被成形为限定用于封装无线电设备的电子部件的空腔，并且用于可靠地接收相关联的电路板。薄膜被设置成在对应的壳体部分的支撑边缘上延伸，使得电路板接地表面与屏蔽膜低电阻接触。因此，膜对外壳提供抵抗电磁辐射的集成屏蔽功能。

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