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1. 发明申请

US20090085058A1 ELECTRONIC DEVICE INCLUDING A MAGNETO-RESISTIVE MEMORY DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE 有权
标题翻译：包括磁电阻记忆体装置的电子装置和形成电子装置的方法
公开(公告)号：US20090085058A1
公开(公告)日：2009-04-02
申请号：US11864409
申请日：2007-09-28
申请人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L29/82 , H01L21/46
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11C11/161 , H01L43/12
摘要： A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
摘要翻译：形成电子器件的工艺可以包括形成包括隧道势垒层的堆叠。隧道阻挡层可以具有大于化学计量比的金属原子与氧原子的比例，其中该比率具有特定值。该方法还可以包括形成具有能够吸收氧的组成的吸气层，以及在吸气层上沉积绝缘层。该方法还可以包括将绝缘层暴露于至少约60℃的温度。在一个实施方案中，在这种曝光之后，将一部分吸气层转化为绝缘材料。在另一个实施例中，电子设备可以包括磁性隧道结和位于另一绝缘层的开口内的相邻绝缘层。

2. 发明授权

US08236578B2 Electronic device including a magneto-resistive memory device and a process for forming the electronic device 有权
公开(公告)号：US08236578B2
公开(公告)日：2012-08-07
申请号：US13358231
申请日：2012-01-25
申请人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L21/00
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11C11/161 , H01L43/12
摘要： A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

3. 发明申请

US20100148167A1 MAGNETIC TUNNEL JUNCTION STACK 审中-公开
公开(公告)号：US20100148167A1
公开(公告)日：2010-06-17
申请号：US12333763
申请日：2008-12-12
申请人： Renu Whig , Frederick B. Mancoff , Nicholas D. Rizzo , Phillip G. Mather
发明人： Renu Whig , Frederick B. Mancoff , Nicholas D. Rizzo , Phillip G. Mather
IPC分类号： H01L43/02 , H01L43/12
CPC分类号： H01L43/08 , B82Y25/00 , G11C11/16 , G11C11/161 , H01F10/30 , H01F10/3254 , H01F10/3272 , H01L43/12
摘要： A magnetic tunnel junction (300) structure includes a layer (308) of iron having a thickness in the range of 1.0 to 5.0 Å disposed between a tunnel barrier (306) and a free magnetic element (310) resulting in high magnetoresistance (MR), low damping and an improved ratio Vc/Vbd of critical switching voltage to tunnel barrier breakdown voltage for improved spin torque yield and reliability while requiring only a low temperature anneal. This improved structure (300) also has a very low resistance-area product MgON diffusion barrier (312) between the free magnetic element (310) and an electrode (314) to prevent diffusion of the electrode into the free layer, which assists in keeping the damping, and therefore also the switching voltage, low. With the low annealing temperature, the breakdown voltage is high, resulting in a favorable ratio of Vc/Vbd and in a high proportion of devices switching before breakdown, therefore improving the yield and reliability of the devices.
摘要翻译：磁隧道结（300）结构包括设置在隧道势垒（306）和自由磁性元件（310）之间的厚度在1.0至5.0范围内的铁层（308），导致高磁阻（MR），低阻尼和提高临界开关电压对隧道势垒击穿电压的比率Vc / Vbd，以提高自旋转矩产量和可靠性，同时仅需要低温退火。这种改进的结构（300）在自由磁性元件（310）和电极（314）之间也具有非常低的阻力面积的产物MgON扩散阻挡层（312），以防止电极扩散到自由层中，这有助于保持阻尼，因此也是开关电压低。在退火温度低的情况下，击穿电压较高，导致Vc / Vbd比例较高，击穿前切换器件的比例较高，因此提高了器件的产量和可靠性。

4. 发明申请

US20120122247A1 ELECTRONIC DEVICE INCLUDING A MAGNETO-RESISTIVE MEMORY DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE 有权
标题翻译：包括磁电阻记忆体装置的电子装置和形成电子装置的方法
公开(公告)号：US20120122247A1
公开(公告)日：2012-05-17
申请号：US13358231
申请日：2012-01-25
申请人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L21/20
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11C11/161 , H01L43/12
摘要： A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
摘要翻译：形成电子器件的工艺可以包括形成包括隧道势垒层的堆叠。隧道阻挡层可以具有大于化学计量比的金属原子与氧原子的比例，其中该比率具有特定值。该方法还可以包括形成具有能够吸收氧的组成的吸气层，以及在吸气层上沉积绝缘层。该方法还可以包括将绝缘层暴露于至少约60℃的温度。在一个实施方案中，在这种曝光之后，将一部分吸气层转化为绝缘材料。在另一个实施例中，电子设备可以包括磁性隧道结和位于另一绝缘层的开口内的相邻绝缘层。

5. 发明授权

US08119424B2 Electronic device including a magneto-resistive memory device and a process for forming the electronic device 有权
标题翻译：包括磁阻存储器件的电子器件和用于形成电子器件的工艺
公开(公告)号：US08119424B2
公开(公告)日：2012-02-21
申请号：US11864409
申请日：2007-09-28
申请人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Phillip G. Mather , Sanjeev Aggarwal , Brian R. Butcher , Renu W. Dave , Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L21/00
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , G11C11/161 , H01L43/12
摘要： A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.
摘要翻译：形成电子器件的工艺可以包括形成包括隧道势垒层的堆叠。隧道阻挡层可以具有大于化学计量比的金属原子与氧原子的比例，其中该比率具有特定值。该方法还可以包括形成具有能够吸收氧的组成的吸气层，以及在吸气层上沉积绝缘层。该方法还可以包括将绝缘层暴露于至少约60℃的温度。在一个实施方案中，在这种曝光之后，将一部分吸气层转化为绝缘材料。在另一个实施例中，电子设备可以包括磁性隧道结和位于另一绝缘层的开口内的相邻绝缘层。

6. 发明申请

US20080258247A1 SPIN-TRANSFER MRAM STRUCTURE AND METHODS 有权
标题翻译：旋转MRAM结构和方法
公开(公告)号：US20080258247A1
公开(公告)日：2008-10-23
申请号：US11736960
申请日：2007-04-18
申请人： Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L29/82 , H01L21/70
CPC分类号： H01L43/08 , G11C11/16 , H01L43/12
摘要： A spin-transfer MRAM bit includes a free magnet layer positioned between a pair of spin polarizers, wherein at least one of the spin polarizers comprises an unpinned synthetic antiferromagnet (SAF). The SAF may include two antiparallel fixed magnet layers separated by a coupling layer. To improve manufacturability, the layers of the SAF may be non-symmetrical (e.g., having different thicknesses or different inherent anisotropies) to assist in achieving proper alignment during anneal. The total magnetic moment of the SAF may be greater than that of the free magnet layer.
摘要翻译：自旋转移MRAM位包括位于一对自旋偏振器之间的自由磁体层，其中至少一个自旋偏振器包括未固化的合成反铁磁体（SAF）。 SAF可以包括由耦合层分开的两个反平行固定磁体层。为了提高可制造性，SAF的层可以是非对称的（例如，具有不同的厚度或不同的固有各向异性），以有助于在退火期间实现适当的对准。 SAF的总磁矩可能大于自由磁体层的总磁矩。

7. 发明授权

US07635903B2 Oscillator and method of manufacture 有权
标题翻译：振荡器和制造方法
公开(公告)号：US07635903B2
公开(公告)日：2009-12-22
申请号：US11225973
申请日：2005-09-13
申请人： Frederick B. Mancoff , Bradley N. Engel , Nicholas D. Rizzo
发明人： Frederick B. Mancoff , Bradley N. Engel , Nicholas D. Rizzo
IPC分类号： H01L29/00
CPC分类号： H01L43/08 , H03B15/006
摘要： An oscillator includes at least one of: (i) a parallel array of resistors (420, 421, 422, 701, 801, 901, 902) or magnetoresistive contacts to a magnetoresistive film (120, 320); and (ii) a series array of resistors (620, 621, 702, 902) or magnetoresistive contacts to individualized areas of at least one magnetoresistive film.
摘要翻译：振荡器包括以下至少一个：（i）电阻器（420,421,422,701,801,901,902）的并联阵列或磁阻膜（120,320）的磁阻触点; 和（ii）至少一个磁阻膜的个体化区域的一系列电阻器（620,621,702,902）或磁阻触点。

8. 发明授权

US07605437B2 Spin-transfer MRAM structure and methods 有权
标题翻译：旋转MRAM结构和方法
公开(公告)号：US07605437B2
公开(公告)日：2009-10-20
申请号：US11736960
申请日：2007-04-18
申请人： Frederick B. Mancoff , Nicholas D. Rizzo
发明人： Frederick B. Mancoff , Nicholas D. Rizzo
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/16 , H01L43/12
摘要： A spin-transfer MRAM bit includes a free magnet layer positioned between a pair of spin polarizers, wherein at least one of the spin polarizers comprises an unpinned synthetic antiferromagnet (SAF). The SAF may include two antiparallel fixed magnet layers separated by a coupling layer. To improve manufacturability, the layers of the SAF may be non-symmetrical (e.g., having different thicknesses or different inherent anisotropies) to assist in achieving proper alignment during anneal. The total magnetic moment of the SAF may be greater than that of the free magnet layer.
摘要翻译：自旋转移MRAM位包括位于一对自旋偏振器之间的自由磁体层，其中至少一个自旋偏振器包括未固化的合成反铁磁体（SAF）。 SAF可以包括由耦合层分开的两个反平行固定磁体层。为了提高可制造性，SAF的层可以是非对称的（例如，具有不同的厚度或不同的固有各向异性），以有助于在退火期间实现适当的对准。 SAF的总磁矩可能大于自由磁体层的总磁矩。

9. 发明授权

US07149106B2 Spin-transfer based MRAM using angular-dependent selectivity 有权
公开(公告)号：US07149106B2
公开(公告)日：2006-12-12
申请号：US10971741
申请日：2004-10-22
申请人： Frederick B. Mancoff , Bradley N. Engel , Nicholas D. Rizzo
发明人： Frederick B. Mancoff , Bradley N. Engel , Nicholas D. Rizzo
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/1659
摘要： A magnetic random access memory (“MRAM”) device can be selectively written using spin-transfer reflection mode techniques. Selectivity of a designated MRAM cell within an MRAM array is achieved by the dependence of the spin-transfer switching current on the relative angle between the magnetizations of the polarizer element and the free magnetic element in the MRAM cell. The polarizer element has a variable magnetization that can be altered in response to the application of a current, e.g., a digit line current. When the magnetization of the polarizer element is in the natural default orientation, the data in the MRAM cell is preserved. When the magnetization of the polarizer element is switched, the data in the MRAM cell can be written in response to the application of a relatively low write current.

10. 发明授权

US07402529B2 Method of applying cladding material on conductive lines of MRAM devices 失效
标题翻译：在MRAM器件的导线上施加覆层材料的方法
公开(公告)号：US07402529B2
公开(公告)日：2008-07-22
申请号：US11139143
申请日：2005-05-26
申请人： Jaynal A. Molla , John D'Urso , Kelly Kyler , Bradley N. Engel , Gregory W. Grynkewich , Nicholas D. Rizzo
发明人： Jaynal A. Molla , John D'Urso , Kelly Kyler , Bradley N. Engel , Gregory W. Grynkewich , Nicholas D. Rizzo
IPC分类号： H01L21/302
CPC分类号： G11C11/16 , H01L27/222
摘要： A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive material for a time sufficient to displacement plate a first barrier layer on the conductive line. The first barrier layer is then immersed in an electroless plating bath to form a flux concentrating layer on the first barrier layer. The flux concentrating layer is immersed in a second bath containing dissolved ions of a second conductive material for a time sufficient to displacement plate a second barrier layer on the flux concentrating layer.
摘要翻译：制造用于MRAM器件的包层区域的方法包括形成靠近磁阻存储器件的导电位线。将导电位线浸入包含第一导电材料的溶解离子的第一槽中足以使导电线上的第一阻挡层移位的时间。然后将第一阻挡层浸入无电镀浴中以在第一阻挡层上形成通量聚集层。将集流层浸入含有第二导电材料的溶解离子的第二槽中，持续足够的时间使得在集流层上移动第二阻挡层。

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