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1. 发明申请

US20060044030A1 Variation tolerant charge leakage correction circuit for phase locked loops 失效
标题翻译：用于锁相环的变容差电荷泄漏校正电路
公开(公告)号：US20060044030A1
公开(公告)日：2006-03-02
申请号：US10926596
申请日：2004-08-26
申请人： Franklin Baez , David Boerstler , Eskinder Hailu , Kazuhiko Miki
发明人： Franklin Baez , David Boerstler , Eskinder Hailu , Kazuhiko Miki
IPC分类号： H03L7/06
CPC分类号： H03L7/0893 , H03L7/095
摘要： The present invention provides for compensation of leakage charge in a PLL. A first plurality and second plurality of charge pumps has a source charge pump and a sink charge pump, and each charge pump has its own switch. A first node is coupled between at least one source charge pump and at least one sink charge pump. A second node coupled between at least one source charge pump and at least one sink charge pump. A PLL filter is coupled to the first node. A dummy filter is coupled to the second node. A first input of a differential mode sensor is coupled to the PLL filter. A second input of a differential mode sensor is coupled to the dummy filter. A first input of a common mode sensor is coupled to the dummy filter. A second input of a common mode sensor coupled to the PLL filter.
摘要翻译：本发明提供了对PLL中的泄漏电荷的补偿。第一多个和第二多个电荷泵具有源电荷泵和吸收电荷泵，并且每个电荷泵具有其自己的开关。第一节点耦合在至少一个源电荷泵和至少一个电荷泵之间。耦合在至少一个源电荷泵和至少一个吸收电荷泵之间的第二节点。 PLL滤波器耦合到第一节点。虚拟滤波器耦合到第二节点。差分模式传感器的第一输入端耦合到PLL滤波器。差模传感器的第二输入端连接到虚拟滤波器。共模传感器的第一输入耦合到虚拟滤波器。耦合到PLL滤波器的共模传感器的第二输入。

2. 发明申请

US20050156640A1 Novel charge leakage correction circuit for applications in PLLs 有权
标题翻译：用于PLL的新型电荷泄漏校正电路
公开(公告)号：US20050156640A1
公开(公告)日：2005-07-21
申请号：US10759942
申请日：2004-01-16
申请人： David Boerstler , Franklin Baez , Eskinder Hailu
发明人： David Boerstler , Franklin Baez , Eskinder Hailu
IPC分类号： H03K5/13 , H03L7/06 , H03L7/089
CPC分类号： H03L7/0891 , H03L7/0895
摘要： An apparatus, a method, and a computer program are provided for correcting charge in a Phased Lock Loop (PLL). Typically, PLL's utilize a Low Pass Filter (LPF). However, as a result of improvement of Complimentary Metal-Oxide on a Semiconductor (CMOS) technology charge leakage has become prevalent within LPFs. As a result, the method, apparatus, and computer program provide a device and/or methodology for correcting for charge leakage.
摘要翻译：提供了一种用于在相位锁定环（PLL）中校正电荷的装置，方法和计算机程序。通常，PLL使用低通滤波器（LPF）。然而，由于半导体（CMOS）技术上的免费金属氧化物的改进，电荷泄漏已经在LPF内普遍存在。因此，该方法，装置和计算机程序提供用于校正电荷泄漏的装置和/或方法。

3. 发明申请

US20070075764A1 Level shifter system and method to minimize duty cycle error due to voltage differences across power domains 失效
标题翻译：电平移位器系统和方法，可以最大限度地减少跨越电源域的电压差造成的占空比误差
公开(公告)号：US20070075764A1
公开(公告)日：2007-04-05
申请号：US11242670
申请日：2005-10-04
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
IPC分类号： H03L5/00
CPC分类号： H03K19/00384 , H03K5/1565 , H03K19/00323 , H03K19/00369 , H03K19/0175
摘要： The present invention provides for a system comprising a first stable voltage module configured to receive a first power supply from a first power supply domain and to generate a first stable voltage in response to the received first power supply. A second stable voltage module is configured to receive a second power supply from a second power supply domain and to generate a second stable voltage in response to the received second power supply. A first set of resistors is coupled to the first stable voltage module and configured in parallel. A second set of resistors is coupled to the second stable voltage module and configured in parallel. A set of capacitors is coupled in parallel to the first set of resistors and the second set of resistors and a plurality of level shifters are coupled to the second set of resistors.
摘要翻译：本发明提供了一种系统，其包括第一稳定电压模块，其被配置为从第一电源域接收第一电源并且响应于所接收的第一电源产生第一稳定电压。第二稳定电压模块被配置为从第二电源域接收第二电源并且响应于所接收的第二电源产生第二稳定电压。第一组电阻器耦合到第一稳定电压模块并且并联配置。第二组电阻器耦合到第二稳定电压模块并且并联配置。一组电容器并联耦合到第一组电阻器，并且第二组电阻器和多个电平移位器耦合到第二组电阻器。

4. 发明申请

US20080111604A1 DIGITAL CIRCUIT TO MEASURE AND/OR CORRECT DUTY CYCLES 有权
标题翻译：数字电路测量和/或校正责任周期
公开(公告)号：US20080111604A1
公开(公告)日：2008-05-15
申请号：US12014501
申请日：2008-01-15
申请人： David Boerstler , Eskinder Hailu , Byron Krauter , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Byron Krauter , Kazuhiko Miki , Jieming Qi
IPC分类号： H03K3/017
CPC分类号： G06F1/10 , H03K5/1565
摘要： A method, an apparatus, and a computer program are provided to measure and/or correct duty cycles. Duty cycles of various signals, specifically clocking signals, are important. However, measurement of very high frequency signals, off-chip, and in a laboratory environment can be very difficult and present numerous problems. To combat problems associated with making off-chip measurements and adjustments of signal duty cycles, comparisons are made between input signals and divided input signals that allow for easy measurement and adjustment of on-chip signals, including clocking signals.
摘要翻译：提供了一种方法，装置和计算机程序来测量和/或校正占空比。各种信号的占空比，特别是时钟信号是很重要的。然而，测量非常高频率的信号，芯片外和实验室环境可能是非常困难的并且存在许多问题。为了解决与片外测量和信号占空比调整相关的问题，可以比较输入信号和分频输入信号，从而便于测量和调整片上信号，包括时钟信号。

5. 发明申请

US20070075370A1 Thermal sensing method and apparatus using existing ESD devices 有权
标题翻译：使用现有ESD器件的热感测方法和设备
公开(公告)号：US20070075370A1
公开(公告)日：2007-04-05
申请号：US11242675
申请日：2005-10-04
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
IPC分类号： H01L23/62
CPC分类号： G01K7/01 , G01K2217/00
摘要： The present invention provides a method, an apparatus, and a computer program product for measuring the temperature of a microprocessor through the use of ESD circuitry. The present invention uses diodes and an I/O pad within ESD circuits to determine the temperature at the location of the ESD circuitry. First, a current measuring device connects to a diode. A user or a computer program disables the protected component or circuitry, and subsequently applies a predetermined voltage to the I/O pad. This creates a reverse saturation current through the diode, which is measured by the current measuring device. From this current the user or a computer program determines the temperature of the microprocessor at the diode through the use of a graphical representation of diode reverse saturation current and corresponding temperature.
摘要翻译：本发明提供了一种通过使用ESD电路来测量微处理器的温度的方法，装置和计算机程序产品。本发明在ESD电路中使用二极管和I / O焊盘来确定ESD电路位置处的温度。首先，电流测量装置连接到二极管。用户或计算机程序禁用受保护的组件或电路，然后将预定电压施加到I / O焊盘。这通过二极管产生反向饱和电流，由电流测量装置测量。从该电流，用户或计算机程序通过使用二极管反向饱和电流和相应温度的图形表示来确定微处理器在二极管处的温度。

6. 发明申请

US20060212739A1 Digital circuit to measure and/or correct duty cycles 有权
标题翻译：用于测量和/或校正占空比的数字电路
公开(公告)号：US20060212739A1
公开(公告)日：2006-09-21
申请号：US11082973
申请日：2005-03-17
申请人： David Boerstler , Eskinder Hailu , Byron Krauter , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Byron Krauter , Kazuhiko Miki , Jieming Qi
IPC分类号： G06F1/04
CPC分类号： G06F1/10 , H03K5/1565
摘要： A method, an apparatus, and a computer program are provided to measure and/or correct duty cycles. Duty cycles of various signals, specifically clocking signals, are important. However, measurement of very high frequency signals, off-chip, and in a laboratory environment can be very difficult and present numerous problems. To combat problems associated with making off-chip measurements and adjustments of signal duty cycles, comparisons are made between input signals and divided input signals that allow for easy measurement and adjustment of on-chip signals, including clocking signals.
摘要翻译：提供了一种方法，装置和计算机程序来测量和/或校正占空比。各种信号的占空比，特别是时钟信号是很重要的。然而，测量非常高频率的信号，芯片外和实验室环境可能是非常困难的并且存在许多问题。为了解决与片外测量和信号占空比调整相关的问题，可以比较输入信号和分频输入信号，从而便于测量和调整片上信号，包括时钟信号。

7. 发明申请

US20050280406A1 PLL filter leakage sensor 失效
标题翻译： PLL滤波器泄漏传感器
公开(公告)号：US20050280406A1
公开(公告)日：2005-12-22
申请号：US10870533
申请日：2004-06-17
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki
IPC分类号： G06F19/00 , H03L7/093
CPC分类号： H03L7/093
摘要： The present invention provides a method, apparatus, and computer program for measuring the current leakage in a Low Pass Filter (LPF) capacitor of a Phased Locked Loop (PLL). As a result of thinner and thinner film capacitors in Complementary Metal-Oxide Semiconductor (CMOS) technology, leakage current, which causes a PLL to drift out of phase lock, has become an increasingly difficult problem. To overcome the leakage current problems, knowing the leakage current of an LPF capacitor is important to implement the correction circuitry. In the present invention, an external interface and a time interface analyzer are used to charge the LPF capacitor and measure the output frequency of the PLL's Voltage Controlled Oscillator. Because of the change in the output frequency, the leakage current can be determined.
摘要翻译：本发明提供一种用于测量相位锁定环（PLL）的低通滤波器（LPF）电容器中的电流泄漏的方法，装置和计算机程序。由于互补金属氧化物半导体（CMOS）技术中薄膜电容器越来越薄，导致PLL漂移出相位锁定的漏电流已经成为越来越难的问题。为了克服漏电流问题，知道LPF电容器的漏电流对于实现校正电路是重要的。在本发明中，使用外部接口和时间接口分析器对LPF电容器充电并测量PLL的压控振荡器的输出频率。由于输出频率的变化，可以确定漏电流。

8. 发明申请

US20060103367A1 Method and apparatus for measuring and adjusting the duty cycle of a high speed clock 失效
标题翻译：用于测量和调整高速时钟占空比的方法和装置
公开(公告)号：US20060103367A1
公开(公告)日：2006-05-18
申请号：US10970284
申请日：2004-10-21
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki
IPC分类号： G01R13/02
CPC分类号： G06F1/06
摘要： An apparatus, a method, and a computer program are provided to measure the duty cycle of a clocking signal in a processor. Traditionally, variations in the duty cycles of clocks within microprocessors have been of considerable concern. By employing frequency dividers and AND gates, the duty cycles of clocks can be precisely measured and adjusted accordingly to account for variation that might occur. The measurements and adjustments, therefore, can improve the operation of a microprocessor or any other clocked semiconductor.
摘要翻译：提供了一种装置，方法和计算机程序来测量处理器中的计时信号的占空比。传统上，微处理器内的时钟的占空比的变化是非常令人担忧的。通过采用分频器和与门，可以精确地测量和调整时钟的占空比，从而考虑到可能发生的变化。因此，测量和调整可以改善微处理器或任何其他时钟半导体的操作。

9. 发明申请

US20070103215A1 Level shifter apparatus and method for minimizing duty cycle distortion 失效
公开(公告)号：US20070103215A1
公开(公告)日：2007-05-10
申请号：US11269245
申请日：2005-11-08
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
IPC分类号： H03K3/017
CPC分类号： H03K19/018521
摘要： A level shifter apparatus and method for minimizing duty cycle distortion are provided. The level shifter includes a bank of comparators each having an associated threshold built into it. The comparators compare a difference in source voltages for two power domains to these built-in thresholds and output a signal indicative of whether the threshold is exceeded. The output signals from the comparators are provided to a thermometric decoder which generates control signals based on these output signals. The control signals are used to control stages in a level shifter for modifying the voltage output of the level shifter. Individual stages may be enabled to thereby monotonically modify the voltage output of the level shifter and thereby decrease a time required to achieve a voltage having a level that causes a state change in a driven circuit. As a result, duty cycle distortion is minimized and maximum operational frequency is increased.

10. 发明申请

US20070008003A1 Self-biased high speed level shifter circuit 有权
标题翻译：自偏置高速电平转换电路
公开(公告)号：US20070008003A1
公开(公告)日：2007-01-11
申请号：US11171758
申请日：2005-06-30
申请人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
发明人： David Boerstler , Eskinder Hailu , Kazuhiko Miki , Jieming Qi
IPC分类号： H03K19/0175
CPC分类号： H03K19/018507
摘要： A method and apparatus for translating signals between different components located in different power boundaries in a mixed voltage system. A level shifter system includes a first level shifter circuit connected to a first voltage source. A second level shifter circuit connects to a second voltage source. An intermediate level shifter circuit has an input that connects to the output of the first level shifter circuit. The output of the intermediate level shifter circuit connects to the input of the second level shifter circuit. The intermediate level shifter circuit uses an intermediate voltage source having an intermediate voltage about midway between the first voltage of the first voltage source and the second voltage of the second voltage source.
摘要翻译：一种用于在混合电压系统中位于不同功率边界的不同部件之间转换信号的方法和装置。电平移位器系统包括连接到第一电压源的第一电平移位器电路。第二电平移位器电路连接到第二电压源。中间电平移位器电路具有连接到第一电平移位器电路的输出的输入。中间电平移位器电路的输出连接到第二电平移位器电路的输入端。中间电平移位器电路使用具有在第一电压源的第一电压和第二电压源的第二电压之间的中间的中间电压的中间电压源。

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