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1. 发明授权

US07071073B2 Process for manufacturing low-cost and high-quality SOI substrates 有权
公开(公告)号：US07071073B2
公开(公告)日：2006-07-04
申请号：US10331189
申请日：2002-12-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76262 , H01L21/31662 , H01L21/76208
摘要： For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

2. 发明授权

US06362070B1 Process for manufacturing a SOI wafer with buried oxide regions without cusps 失效
标题翻译：用于制造具有埋藏氧化物区域的SOI晶片的方法，而不具有尖端
公开(公告)号：US06362070B1
公开(公告)日：2002-03-26
申请号：US09558934
申请日：2000-04-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L2176
CPC分类号： H01L21/02238 , H01L21/02299 , H01L21/31662 , H01L21/32 , H01L21/76208 , H01L21/76248
摘要： A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions, implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions; and forming retarding regions on the bottom of the trenches, wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions and then proceeds downwards; thereby, a continuous region of buried oxide is formed and is overlaid by non-oxidized regions corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions and the retarding regions are formed through two successive implants, including an angle implant, wherein the protruding regions shield the bottom portions of the adjacent protruding regions, as well as the bottom of the trenches, and a vertical implant is made perpendicularly to the wafer.
摘要翻译：一种用于制造具有埋藏氧化物区域而没有尖端的SOI晶片的方法，包括在单晶半导体材料的晶片中形成在横向延伸并限定突出区域的沟槽; 形成掩蔽区域，注入氮离子，掩蔽区域完全围绕突出区域的尖端; 以及在沟槽的底部形成延迟区域，其中以比掩蔽区域低的剂量注入氮。然后进行热氧化，并从突出区域的底部开始，然后向下移动; 由此，形成了埋入氧化物的连续区域，并且由对应于突出区域的尖端的非氧化区域覆盖并形成用于随后的外延生长的核区域。掩模区域和延迟区域通过两个连续的植入物形成，包括角度注入，其中突出区域屏蔽相邻突出区域的底部以及沟槽的底部，垂直植入物垂直于晶圆。

3. 发明授权

US08334188B2 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US08334188B2
公开(公告)日：2012-12-18
申请号：US12791553
申请日：2010-06-01
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

4. 发明申请

US20080036030A1 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US20080036030A1
公开(公告)日：2008-02-14
申请号：US11904745
申请日：2007-09-28
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L29/00 , H01L21/764
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

5. 发明申请

US20070126071A1 Process for manufacturing thick suspended structures of semiconductor material 有权
标题翻译：用于制造半导体材料的厚悬浮结构的方法
公开(公告)号：US20070126071A1
公开(公告)日：2007-06-07
申请号：US11541376
申请日：2006-09-27
申请人： Pietro Corona , Flavio Villa , Gabriele Barlocchi
发明人： Pietro Corona , Flavio Villa , Gabriele Barlocchi
IPC分类号： H01L29/84 , H01L21/00
CPC分类号： B81C1/00158 , B81B2201/025 , B81B2203/0109 , B81B2203/0315
摘要： A process for manufacturing a suspended structure of semiconductor material envisages the steps of: providing a monolithic body of semiconductor material having a front face; forming a buried cavity within the monolithic body, extending at a distance from the front face and delimiting, with the front face, a surface region of the monolithic body, said surface region having a first thickness; carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body towards the surface region and thus form a suspended structure above the buried cavity, the suspended structure having a second thickness greater than the first thickness. The thickening thermal treatment is an annealing treatment.
摘要翻译：制造半导体材料的悬浮结构的方法设想的步骤：提供具有正面的半导体材料的整体; 在所述整体式主体内形成掩埋空腔，所述掩埋腔在所述前表面的一定距离处延伸并且与所述前表面一起界定所述整体式主体的表面区域，所述表面区域具有第一厚度; 进行增稠热处理，使得整体式体的半导体材料朝向表面区域移动，从而在掩埋空腔之上形成悬浮结构，该悬浮结构的第二厚度大于第一厚度。增稠热处理是退火处理。

6. 发明申请

US20060260408A1 Integrated differential pressure sensor and manufacturing process thereof 有权
标题翻译：集成差压传感器及其制造工艺
公开(公告)号：US20060260408A1
公开(公告)日：2006-11-23
申请号：US11417683
申请日：2006-05-04
申请人： Flavio Villa , Pietro Corona , Gabriele Barlocchi , Lorenzo Baldo
发明人： Flavio Villa , Pietro Corona , Gabriele Barlocchi , Lorenzo Baldo
IPC分类号： B05D5/12 , G01L7/08
CPC分类号： G01L9/0045 , G01L13/025
摘要： A process for manufacturing an integrated differential pressure sensor includes forming, in a monolithic body of semiconductor material having a first face and a second face, a cavity extending at a distance from the first face and delimiting therewith a flexible membrane, forming an access passage in fluid communication with the cavity, and forming, in the flexible membrane, at least one transduction element configured so as to convert a deformation of the flexible membrane into electrical signals. The cavity is formed in a position set at a distance from the second face and delimits, together with the second face, a portion of the monolithic body. In order to form the access passage, the monolithic body is etched so as to form an access trench extending through it.
摘要翻译：一种用于制造集成差压传感器的方法，包括在具有第一面和第二面的半导体材料的整体中形成一个与第一面相距一定距离的空腔，并将其限定在柔性膜上，形成入口通道与空腔流体连通，以及在柔性膜中形成至少一个换能元件，其构造成将柔性膜的变形转换为电信号。空腔形成在距第二面一定距离处的位置，并与第二面一起界定整体式的一部分。为了形成进入通道，对整体式主体进行蚀刻以便形成延伸通过其的通道沟槽。

7. 发明授权

US07294536B2 Process for manufacturing an SOI wafer by annealing and oxidation of buried channels 有权
标题翻译：通过掩埋通道的退火和氧化来制造SOI晶片的工艺
公开(公告)号：US07294536B2
公开(公告)日：2007-11-13
申请号：US10327702
申请日：2002-12-20
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/00
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

8. 发明申请

US20060017131A9 Process for manufacturing an SOI wafer by annealing and oxidation of buried channels 有权
公开(公告)号：US20060017131A9
公开(公告)日：2006-01-26
申请号：US10327702
申请日：2002-12-20
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L29/00
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.

9. 发明授权

US06759132B2 Method for the manufacture of electromagnetic radiation reflecting devices 有权
标题翻译：制造电磁辐射反射装置的方法
公开(公告)号：US06759132B2
公开(公告)日：2004-07-06
申请号：US10295767
申请日：2002-11-14
申请人： Ubaldo Mastromatteo , Pietro Corona , Flavio Villa , Gabriele Barlocchi
发明人： Ubaldo Mastromatteo , Pietro Corona , Flavio Villa , Gabriele Barlocchi
IPC分类号： B32B900
CPC分类号： G11B7/1362 , G02B5/08 , G02B6/4214 , G11B7/123 , Y10T428/12528
摘要： Method for manufacturing electromagnetic radiation reflecting devices, said method comprising the steps of: a) providing a silicon substrate defined by at least one first free surface, b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface, and c)etching the region of the free surface by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface of the substrate inclined in relation to said first surface. Furthermore, said first free surface is parallel to the crystalline planes {110} of silicon substrate and said step (c) comprises a progressing step of the anisotropic agent such that the second free surface resulting from the etching step is parallel to the planes {100} of said substrate.
摘要翻译：用于制造电磁辐射反射装置的方法，所述方法包括以下步骤：a）提供由至少一个第一自由表面限定的硅衬底，b）在所述第一表面上形成一层保护材料，所述保护材料层具有暴露区域的第一自由表面，以及c）借助于各向异性剂蚀刻所述自由表面的区域以去除所述衬底的至少一部分并且限定所述衬底相对于所述第一表面倾斜的第二自由表面。此外，所述第一自由表面平行于硅衬底的晶面{110}，并且所述步骤（c）包括各向异性剂的进行步骤，使得由蚀刻步骤产生的第二自由表面平行于平面{100 }。

10. 发明授权

US07754578B2 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US07754578B2
公开(公告)日：2010-07-13
申请号：US11904745
申请日：2007-09-28
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

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