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1. 发明授权

US6156600A Method for fabricating capacitor in integrated circuit 有权
标题翻译：集成电路制造电容器的方法
公开(公告)号：US6156600A
公开(公告)日：2000-12-05
申请号：US195173
申请日：1998-11-17
申请人： Fang-Ching Chao , Wen-Yi Hsieh , Kuo-Tai Huang
发明人： Fang-Ching Chao , Wen-Yi Hsieh , Kuo-Tai Huang
IPC分类号： H01L27/04 , H01L21/02 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L21/8234
CPC分类号： H01L28/40 , H01L21/31604 , H01L28/56
摘要： A method for fabricating a capacitor in an integrated circuit, using tantalum oxide as the dielectric layer to obtain a higher capacitance. A barrier layer is formed between the polysilicon layer and the tantalum oxide layer to prevent the formation of a silicon oxide layer. Thus, that capacitance of the capacitor is not reduced by the additional thickness of the silicon oxide layer.
摘要翻译：一种用于在集成电路中制造电容器的方法，其使用氧化钽作为电介质层以获得更高的电容。在多晶硅层和氧化钽层之间形成阻挡层，以防止形成氧化硅层。因此，电容器的电容量不会被氧化硅层的附加厚度减小。

2. 发明授权

US6042996A Method of fabricating a dual damascene structure 失效
标题翻译：制造双镶嵌结构的方法
公开(公告)号：US6042996A
公开(公告)日：2000-03-28
申请号：US59071
申请日：1998-04-13
申请人： Benjamin Szu-Min Lin , Fang-Ching Chao
发明人： Benjamin Szu-Min Lin , Fang-Ching Chao
IPC分类号： G03F1/00 , H01L21/027 , H01L21/311 , H01L21/768 , G03F7/00
CPC分类号： H01L21/0274 , H01L21/31144 , H01L21/76807 , H01L2221/1021
摘要： A method of fabricating a dual damascene structure is provided comprising forming a photoresist layer on a dielectric layer. A mask including a region that light completely passes over, a region that light partially passes over and a dense region is used for exposure. A development step is carried out to remove the photoresist layer under the region that light completely passes over, to partially remove the photoresist layer under the region that light partially passes over and to leave the photoresist layer under the dense region. The photoresist layer remaining from the forgoing step and the dielectric layer are partially removed to form a via and a trench in the dielectric layer. The via and the trench are filled with metal to form a dual damascene structure.
摘要翻译：提供一种制造双镶嵌结构的方法，包括在电介质层上形成光致抗蚀剂层。包括光完全通过的区域，光部分通过的区域和致密区域的掩模用于曝光。进行显影步骤以在光完全通过的区域下去除光致抗蚀剂层，以在光部分通过的区域部分去除光致抗蚀剂层，并将光致抗蚀剂层留在致密区域下方。从前述步骤残留的光致抗蚀剂层和电介质层被部分去除以在电介质层中形成通孔和沟槽。通孔和沟槽用金属填充以形成双镶嵌结构。

3. 发明授权

US5952689A Semiconductor memory device having tree-type capacitor 失效
标题翻译：具有树型电容器的半导体存储器件
公开(公告)号：US5952689A
公开(公告)日：1999-09-14
申请号：US706732
申请日：1996-09-06
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L27/108
CPC分类号： H01L27/10817
摘要： A semiconductor memory device with a tree-type capacitor having increased area for reliable storage thereon of electrical charges representative of data. The tree-type capacitor includes a storage electrode including a trunk-like conductive layer and at least a branch-like conductive layer. The trunk-like conductive layer is electrically coupled to one of the source/drain regions of a transfer transistor in the semiconductor memory device and extends substantially upright. The branch-like conductive layer has one end connected to the trunk-like conductive layer and can be structured in various shapes that allow the branch-like conductive layer to have an increased surface area. A dielectric layer is formed over exposed surfaces of the trunk-like conductive layer and the branch-like conductive layer. An overlaying conductive layer is formed over the dielectric layer and serves as an opposing electrode for the tree-type capacitor.
摘要翻译：具有树形电容器的半导体存储器件具有增加的面积，用于可靠地存储代表数据的电荷。树型电容器包括具有树干状导电层和至少分支状导电层的存储电极。躯干状导电层与半导体存储器件中的传输晶体管的源极/漏极区之一电耦合并基本上直立延伸。分支状导电层的一端连接到树干状导电层，并且可以被构造成允许分支状导电层具有增加的表面积的各种形状。在树干状导电层和分支状导电层的暴露表面上形成电介质层。覆盖导电层形成在电介质层上并用作树型电容器的相对电极。

4. 发明授权

US5863821A Method of fabricating a semiconductor memory device having a tree-typecapacitor 失效
标题翻译：制造具有树型电容器的半导体存储器件的方法
公开(公告)号：US5863821A
公开(公告)日：1999-01-26
申请号：US706705
申请日：1996-09-06
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817 , H01L28/90
摘要： A method for fabricating a semiconductor memory device with a tree-type capacitor having increased area for reliable storage of electrical charges representative of data thereon. The tree-type capacitor includes a storage electrode having a trunk-like conductive layer coupled to at least one branch-like conductive layer, which can be structured in various shapes that allow the branch-like conductive layer to have increased surface area. The branch-like conductive layers are formed by successively depositing at least one insulating layer and at least one conductive layer over the substrate such that the conductive layer makes a series of twists and turns, defining the shape of the branch-like conductive layer. The surface of the built-up wafer is removed until the conductive layer is divided into a number of segments. A contact hole is formed through the conductive layer to a drain/source region of a transistor in the device, and is filled with a conductive layer, forming the trunk-like layer. The insulating material is wet-etched away, leaving the conductive segment attached to the truck-like layer as a branch-like conductive layer. A dielectric layer is formed over exposed surfaces of the trunk-like conductive layer and the branch-like conductive layer, and a further conductive layer is formed overlaying the dielectric layer to serve as an opposing electrode of the tree-type capacitor.
摘要翻译：一种用于制造具有增加面积的树型电容器的半导体存储器件的方法，用于可靠地存储代表其上的数据的电荷。树型电容器包括具有耦合到至少一个分支状导电层的树干状导电层的存储电极，其可以被构造成允许分支状导电层具有增加的表面积的各种形状。分支状导电层通过在衬底上依次沉积至少一个绝缘层和至少一个导电层而形成，使得导电层形成一系列扭转和转弯，限定了分支状导电层的形状。去除积层晶片的表面，直到导电层被分成若干段。通过导电层形成接触孔到器件中的晶体管的漏极/源极区，并且填充有形成树干状层的导电层。将绝缘材料湿式蚀刻掉，将导电段作为分支状导电层附着在卡车状层上。在树干状导电层和分支状导电层的暴露表面上形成电介质层，并且形成覆盖在电介质层上的另一导电层，作为树型电容器的相对电极。

5. 发明授权

US5811848A Capacitor structure for a semiconductor memory device 失效
标题翻译：半导体存储器件的电容结构
公开(公告)号：US5811848A
公开(公告)日：1998-09-22
申请号：US749895
申请日：1996-11-18
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108 , H01L29/76
CPC分类号： H01L27/10817
摘要： A semiconductor memory device includes a substrate, a transistor on the substrate, and a capacitor. The storage electrode of the capacitor includes upper and lower trunk-like conductive layers, and at least a first branch-like conductive layer. The branch-like conductive layer is L-shaped in cross section. The trunk-like conductive layer is connected to a source/drain region of the transistor.
摘要翻译：半导体存储器件包括衬底，衬底上的晶体管和电容器。电容器的存储电极包括上和下主干状导电层，以及至少第一分支状导电层。分支状导电层的横截面为L形。躯干状导体层与晶体管的源极/漏极区域连接。

6. 发明授权

US5912485A Capacitor structure for a semiconductor memory device 失效
标题翻译：半导体存储器件的电容结构
公开(公告)号：US5912485A
公开(公告)日：1999-06-15
申请号：US736598
申请日：1996-10-24
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817
摘要： A semiconductor memory device includes a substrate, a transfer transistor, and a storage capacitor formed on the substrate. The transfer transistor has source/drain regions, one of which is electrically connected to the storage capacitor. The storage capacitor includes a tree-like conductive layer, a dielectric layer, and an upper conductive layer. The tree-like conductive layer includes a trunk-like conductive layer and a branch-like conductive layer. The trunk-like conductive layer and the branch-like conductive layer form a storage electrode of the storage capacitor. The upper conductive layer serves as an opposing electrode of the storage capacitor.
摘要翻译：半导体存储器件包括形成在衬底上的衬底，转移晶体管和存储电容器。转移晶体管具有源极/漏极区域，其中之一电连接到存储电容器。存储电容器包括树状导电层，电介质层和上导电层。树状导电层包括树干状导电层和分支状导电层。躯干状导电层和分支状导电层形成存储电容器的存储电极。上导电层用作存储电容器的相对电极。

7. 发明授权

US5811332A Method of fabricating a capacitor structure for a semiconductor memory device 失效
标题翻译：制造半导体存储器件的电容器结构的方法
公开(公告)号：US5811332A
公开(公告)日：1998-09-22
申请号：US757676
申请日：1996-11-29
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817 , Y10S148/014
摘要： Fabricating a semiconductor memory device on a substrate having a transfer transistor formed thereon includes forming a first insulating layer over the transfer transistor, an etching protection layer over the first insulating layer, a second insulating layer over the etching protection layer, and a stacked layer over the second insulating layer, wherein the stacked layer has a recess therein disposed above a source/drain region of the transistor and exposing a portion of the second insulating layer. A third insulating layer is formed around the periphery of the recess and a fourth insulating layer is formed to fill the recess. Then the process includes removing the third insulating layer and the fourth insulating layer from the recess, and a portion of the second insulating layer directly below the third insulating layer to form a cavity which does not expose the etching protection layer. A first conductive layer is then formed to fill the recess and the cavity, followed by removing the stacked layer. A fifth insulating layer is formed above the second insulating layer and the first conductive layer and a second conductive layer is formed over the fifth insulating layer, the second conductive layer penetrating the fifth insulating layer, the first conductive layer, the second insulating layer, the etching protection layer, and the first insulating layer, and being in electrical contact with the source/drain region. The second and fifth insulating layers are removed and a dielectric layer, a third conductive layer are formed on exposed surfaces of at least the first and second conductive layers.
摘要翻译：在其上形成有转移晶体管的基板上制造半导体存储器件包括在转移晶体管上方形成第一绝缘层，在第一绝缘层上形成蚀刻保护层，在蚀刻保护层上方形成第二绝缘层，所述第二绝缘层，其中所述堆叠层具有其中设置在所述晶体管的源极/漏极区域上方的凹部，并暴露所述第二绝缘层的一部分。围绕凹部的周边形成第三绝缘层，并且形成第四绝缘层以填充凹部。然后，该处理包括从凹部去除第三绝缘层和第四绝缘层，以及将第二绝缘层的一部分直接从第三绝缘层的下方移除，以形成不暴露蚀刻保护层的空腔。然后形成第一导电层以填充凹部和空腔，随后移除堆叠层。第五绝缘层形成在第二绝缘层的上方，第一导电层和第二导电层形成在第五绝缘层上，第二导电层穿透第五绝缘层，第一导电层，第二绝缘层，蚀刻保护层和第一绝缘层，并且与源极/漏极区域电接触。去除第二和第五绝缘层，并且在至少第一和第二导电层的暴露表面上形成电介质层，第三导电层。

8. 发明授权

US5759890A Method for fabricating a tree-type capacitor structure for a semiconductor memory device 失效
标题翻译：一种用于半导体存储器件的树型电容器结构的制造方法
公开(公告)号：US5759890A
公开(公告)日：1998-06-02
申请号：US751442
申请日：1996-11-18
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817
摘要： A method of fabricating a storage electrode of a storage capacitor of a semiconductor memory device, that includes a substrate, and a transfer transistor formed on the substrate. A first conductive layer is formed connected to the source/drain region. A first insulating layer is then formed over the first conductive layer. A first film is on a portion of the first insulating layer and a second film on the first film, wherein the first film and the second film form a stacked layer, the stacked layer having a sidewall. A second insulating layer is formed on the sidewall of the stacked layer. A third insulating layer is then over the substrate. The second insulating layer and a portion of the first insulating layer therebeneath are removed to form a first opening in the first insulating layer without exposing the first conductive layer. The fourth insulating layer is then removed and a second conductive layer is formed over the substrate and so as to substantially fill the first opening. The stacked layer and a portion of the second conductive layer thereon are then removed. A second opening is formed in the first and second conductive layers to expose a portion of the first insulating layer; and a third conductive layer is formed at a periphery of the opening, in connection with the peripheral edges of the first and second conductive layers, wherein the storage electrode includes the first, second and third conductive layers.
摘要翻译：一种制造半导体存储器件的存储电容器的存储电极的方法，其包括衬底和形成在衬底上的转移晶体管。形成连接到源/漏区的第一导电层。然后在第一导电层上形成第一绝缘层。第一膜位于第一绝缘层的一部分上，第一膜上的第二膜，其中第一膜和第二膜形成堆叠层，堆叠层具有侧壁。第二绝缘层形成在堆叠层的侧壁上。然后在衬底上方第三绝缘层。除去第二绝缘层和其下的第一绝缘层的一部分，以在第一绝缘层中形成第一开口，而不暴露第一导电层。然后去除第四绝缘层，并且在衬底上形成第二导电层，并且基本上填充第一开口。然后去除层叠层和其上的第二导电层的一部分。在第一和第二导电层中形成第二开口以暴露第一绝缘层的一部分; 并且与所述第一和第二导电层的周边边缘相连，在所述开口的周边处形成第三导电层，其中所述存储电极包括所述第一，第二和第三导电层。

9. 发明授权

US5747196A Method of fabricating a phase-shift photomask 失效
标题翻译：制造相移光掩模的方法
公开(公告)号：US5747196A
公开(公告)日：1998-05-05
申请号：US695300
申请日：1996-08-09
申请人： Fang-Ching Chao , Tien-Chiieh Li
发明人： Fang-Ching Chao , Tien-Chiieh Li
IPC分类号： G03F1/29 , G03F9/00
CPC分类号： G03F1/29
摘要： A method of forming a phase-shift photomask that reduces the defect density, manufacture cost, and fabrication processing time. A transparent layer is prepared. Then a light-transmissive thin film and a light-blocking thin film are successively formed over the transparent layer. Using a photoresist mask, a first anisotropic etch is performed on the wafer to remove exposed parts of the light-transmissive thin film and the light-blocking thin film. An isotropic etch is then performed on the photoresist layer so as to uncover a specific width of an edge part of the light-blocking thin film. Using the etched photoresist layer as a mask, a second anisotropic etch is performed on the light-blocking thin film. The photoresist layer is then removed to form the desired phase-shift photomask.
摘要翻译：一种形成减少缺陷密度，制造成本和制造处理时间的相移光掩模的方法。制备透明层。然后在透明层上依次形成透光薄膜和遮光薄膜。使用光致抗蚀剂掩模，在晶片上执行第一各向异性蚀刻以去除透光薄膜和遮光薄膜的曝光部分。然后对光致抗蚀剂层进行各向同性蚀刻，以便露出遮光薄膜的边缘部分的特定宽度。使用蚀刻的光致抗蚀剂层作为掩模，对遮光薄膜进行第二各向异性蚀刻。然后去除光致抗蚀剂层以形成所需的相移光掩模。

10. 发明授权

US5719419A Capacitor structure for a dynamic random access memory cell 失效
标题翻译：动态随机存取存储单元的电容结构
公开(公告)号：US5719419A
公开(公告)日：1998-02-17
申请号：US735562
申请日：1996-10-23
申请人： Fang-Ching Chao
发明人： Fang-Ching Chao
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817
摘要： A structure and a method to increase the capacitance of a DRAM capacitor by forming a capacitor electrode with cellular voids to add surface area. According to the method: a transfer transistor with a gate electrode and source-drain electrode regions is formed on a semiconductor substrate. An insulating layer is formed on the semiconductor substrate and the transfer transistor, and the insulating layer is etched to form a contact void for exposing the surface of one of the source-drain electrode areas as a contact. A first conductive layer is formed on the insulating layer and is coupled to the contact through the contact void. On the first conductive layer, at least one middle insulating layer and one middle conductive layer are formed alternately to construct a multiple layer structure. Within the middle insulating layer(s), intercommunicating voids are formed through which the middle conductive layer is coupled to the first conductive layer is coupled to the first conductive layer. Thereafter, the middle conductive layer, the middle insulating layer and the first conductive layer are etched selectively to define an area of a capacitor. The middle insulating layer is removed by isotropic etching to form surface-increasing voids, and a cellular structure as a storage electrode is formed by the first conductive layer and the middle conductive layer. A dielectric layer is formed on the exposed surface of the storage electrode. A second conductive layer as an opposed electrode of the capacitor is then formed on the dielectric layer.
摘要翻译：通过形成具有细胞空隙的电容器电极来增加DRAM电容器的电容的结构和方法以增加表面积。根据该方法：在半导体衬底上形成具有栅极电极和源极 - 漏极电极区域的转移晶体管。在半导体衬底和转移晶体管上形成绝缘层，并且蚀刻绝缘层以形成接触空隙，用于将源极 - 漏极电极区域之一的表面暴露为接触。在绝缘层上形成第一导电层，并通过接触空隙与触点相连。在第一导电层上交替地形成至少一个中间绝缘层和一个中间导电层以构成多层结构。在中间绝缘层中，形成相互连通的空隙，中间导电层耦合到第一导电层与第一导电层耦合。此后，选择性地蚀刻中间导电层，中间绝缘层和第一导电层以限定电容器的面积。通过各向同性蚀刻去除中间绝缘层以形成增加表面的空隙，并且通过第一导电层和中间导电层形成作为存储电极的多孔结构。在存储电极的暴露表面上形成介电层。然后在电介质层上形成作为电容器的相对电极的第二导电层。

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