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1. 发明申请

US20050119252A1 Ligands of melanocortin receptors and compositions and methods related thereto 审中-公开
标题翻译：黑皮质素受体配体及其组合物和方法
公开(公告)号：US20050119252A1
公开(公告)日：2005-06-02
申请号：US10971732
申请日：2004-10-22
申请人： Fabio Tucci , Joe Tran , Wei-Chuan Chen , Wanlong Jiang , Chen Chen
发明人： Fabio Tucci , Joe Tran , Wei-Chuan Chen , Wanlong Jiang , Chen Chen
IPC分类号： A61K31/495 , A61K31/506 , A61K31/551 , C07D207/26 , C07D207/27 , C07D213/75 , C07D241/04 , C07D295/185 , C07D295/215 , C07D401/04 , C07D401/06 , C07D401/12 , C07D401/14 , C07D403/06 , C07D403/12 , C07D403/14 , C07D413/14 , C07D417/14 , C07D43/14
CPC分类号： C07D295/185 , C07D207/27 , C07D213/75 , C07D295/215 , C07D401/04
摘要： Compounds which function as melanocortin receptor ligands and having utility in the treatment of melanocortin receptor-based disorders. The compounds have the following structure (I): including stereoisomers, prodrugs, and pharmaceutically acceptable salts thereof, wherein m, n, q, s, R1, R1a, R1b, R2, R3, R4a, R4b, R5a, R5b, X1, X2, X3, X4 and Ar are as defined herein. Pharmaceutical compositions containing a compound of structure (I), as well as methods relating to the use thereof, are also disclosed.
摘要翻译：作为黑皮质素受体配体起作用并可用于治疗基于黑皮质素受体的疾病的化合物。所述化合物具有以下结构（I）：包括其立体异构体，前药和药学上可接受的盐，其中m，n，q，s，R 1，R 1a， R 1b，R 2，R 3，R 4a，R 4b， R 5a，R 5b，X 1，X 2，X 3， X 4和Ar如本文所定义。还公开了含有结构（I）化合物的药物组合物以及与其用途有关的方法。

2. 发明申请

US20050192286A1 Ligands of melanocortin receptors and compositions and methods related thereto 审中-公开
标题翻译：黑皮质素受体配体及其组合物和方法
公开(公告)号：US20050192286A1
公开(公告)日：2005-09-01
申请号：US10972064
申请日：2004-10-22
申请人： Joe Tran , Fabio Tucci , Wanlong Jiang , Wei-Chuan Chen , Dragan Marinkovic , Melissa Arellano , Nicole White , Chen Chen
发明人： Joe Tran , Fabio Tucci , Wanlong Jiang , Wei-Chuan Chen , Dragan Marinkovic , Melissa Arellano , Nicole White , Chen Chen
IPC分类号： A61K31/496 , C07D207/16 , C07D207/26 , C07D207/277 , C07D263/24 , C07D277/14 , C07D295/185 , C07D307/24 , C07D307/33 , C07D317/32 , C07D333/38 , C07D333/48 , C07D401/04 , C07D401/12 , C07D403/12 , C07D405/04 , C07D405/06 , C07D405/12 , C07D405/14 , C07D409/12 , C07D409/14 , C07D417/12 , C07D43/02
CPC分类号： C04B35/632 , C07D207/16 , C07D207/277 , C07D263/24 , C07D295/185 , C07D307/24 , C07D307/33 , C07D317/32 , C07D333/38 , C07D333/48 , C07D401/12 , C07D403/12 , C07D405/04 , C07D405/12 , C07D405/14 , C07D409/12 , C07D409/14 , C07D417/12
摘要： Compounds which function as melanocortin receptor ligands and having utility in the treatment of melanocortin receptor-based disorders. The compounds have the following structure (I): including stereoisomers, prodrugs, and pharmaceutically acceptable salts thereof, wherein m, n, q, s, R1, R1a, R1b, R2, R3, R4, X1, X2 and X3 are as defined herein. Pharmaceutical compositions containing a compound of structure (I), as well as methods relating to the use thereof, are also disclosed.
摘要翻译：作为黑皮质素受体配体起作用并可用于治疗基于黑皮质素受体的疾病的化合物。所述化合物具有以下结构（I）：包括立体异构体，前药和其药学上可接受的盐，其中m，n，q，s，R 1，R 1 a R 1b，R 2，R 3，R 4，X 1， X 2和X 3如本文所定义。还公开了含有结构（I）化合物的药物组合物以及与其用途有关的方法。

3. 发明授权

US08367681B2 Pyrazolopyrimidines and related heterocycles as kinase inhibitors 有权
标题翻译：吡唑并嘧啶和相关杂环作为激酶抑制剂
公开(公告)号：US08367681B2
公开(公告)日：2013-02-05
申请号：US12784271
申请日：2010-05-20
申请人： Mustapha Haddach , Joe Tran
发明人： Mustapha Haddach , Joe Tran
IPC分类号： A01N43/90 , A61K31/519 , C07D487/00
CPC分类号： C07D487/04
摘要： The invention provides compounds of general formula (I) that inhibit selected kinases (Pim and/or CK2 kinases) and compositions containing such compounds. These compounds and compositions are useful for treating proliferative disorders such as cancer, as well as other kinase-associated conditions including inflammation, pain, and certain infections and immunological disorders.
摘要翻译：本发明提供抑制选择的激酶（Pim和/或CK2激酶）的通式（I）化合物和含有这些化合物的组合物。这些化合物和组合物可用于治疗增殖性疾病如癌症，以及其它激酶相关病症，包括炎症，疼痛以及某些感染和免疫学疾病。

4. 发明申请

US20070037342A1 Method to obtain fully silicided poly gate 有权
标题翻译：获得完全硅化多孔的方法
公开(公告)号：US20070037342A1
公开(公告)日：2007-02-15
申请号：US11201924
申请日：2005-08-11
申请人： Freidoon Mehrad , Shaofeng Yu , Joe Tran
发明人： Freidoon Mehrad , Shaofeng Yu , Joe Tran
IPC分类号： H01L21/8238 , H01L21/336 , H01L21/4763 , H01L21/3205
CPC分类号： H01L21/823425 , H01L21/28097 , H01L21/31111 , H01L21/31116 , H01L21/823443 , H01L21/823468 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layer 610 over gate structures 230 located over a microelectronics substrate 210 wherein the gate structures 230 include sidewall spacers 515 and have a doped region 525 located between them. A protective layer 710 is placed over the capping layer 610 and the doped region 525, and a portion of the protective layer 710 and capping layer 610 that are located over the gate structures are removed to expose a top surface of the gate structures 230. A remaining portion of the protective layer 710 and capping layer 610 remains over the doped region 525. With the top surface of the gate structures 230 exposed, metal is incorporated into the gate structures to form gate electrodes 230.
摘要翻译：本发明提供一种制造微电子器件的方法。在一个方面，该方法包括在位于微电子器件衬底210之上的栅极结构230上形成覆盖层610，其中栅极结构230包括侧壁间隔物515并且具有位于它们之间的掺杂区域525。保护层710放置在覆盖层610和掺杂区域525上方，并且去除位于栅极结构上方的保护层710和覆盖层610的一部分以露出栅极结构230的顶表面。保护层710和覆盖层610的剩余部分保留在掺杂区域525上。在栅极结构230的顶表面暴露的情况下，金属被结合到栅极结构中以形成栅电极230。

5. 发明申请

US20060175294A1 Chemical mechanical polishing method and apparatus 审中-公开
标题翻译：化学机械抛光方法和设备
公开(公告)号：US20060175294A1
公开(公告)日：2006-08-10
申请号：US11327903
申请日：2006-01-09
申请人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
发明人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
IPC分类号： C03C15/00 , H01L21/306 , H01L21/00 , C23F1/00
CPC分类号： B24B37/26 , H01L21/31053
摘要： A method for removing material from the surface of a semiconductor wafer with a chemical mechanical polishing process is described. The method uses a polishing pad on which a line-pattern of grooves is formed. The pattern comprises orderly spaced grooved-area and area without grooves. The method combines information of the surface topography of the wafer, the nature of the material to be removed, and the available groove pattern on the surface of the polishing pad to generate a process recipe in which the resident time of portions of the semiconductor wafer spends at the grooved and un-grooved areas of the polishing pad during the chemical mechanical polishing process is pre-determined.
摘要翻译：描述了通过化学机械抛光工艺从半导体晶片的表面去除材料的方法。该方法使用其上形成有线图案的抛光垫。该图案包括有序间隔的开槽面积和无凹槽的区域。该方法结合了晶片的表面形貌，待去除材料的性质和抛光垫表面上的可用凹槽图案的信息，以产生半导体晶片的部分驻留时间花费的处理配方在化学机械抛光过程中在抛光垫的开槽和未开槽区域预先确定。

6. 发明申请

US20070050077A1 Chemical Mechanical Polishing Method and Apparatus 审中-公开
标题翻译：化学机械抛光方法和装置
公开(公告)号：US20070050077A1
公开(公告)日：2007-03-01
申请号：US11551793
申请日：2006-10-23
申请人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
发明人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
IPC分类号： G06F19/00
CPC分类号： B24B37/26 , H01L21/31053
摘要： A method for removing material from the surface of a semiconductor wafer with a chemical mechanical polishing process is described. The method uses a polishing pad on which a line-pattern of grooves is formed. The pattern comprises orderly spaced grooved-area and area without grooves. The method combines information of the surface topography of the wafer, the nature of the material to be removed, and the available groove pattern on the surface of the polishing pad to generate a process recipe in which the resident time of portions of the semiconductor wafer spends at the grooved and un-grooved areas of the polishing pad during the chemical mechanical polishing process is pre-determined.
摘要翻译：描述了通过化学机械抛光工艺从半导体晶片的表面去除材料的方法。该方法使用其上形成有线图案的抛光垫。该图案包括有序间隔的开槽面积和无凹槽的区域。该方法结合了晶片的表面形貌，待去除材料的性质和抛光垫表面上的可用凹槽图案的信息，以产生半导体晶片的部分驻留时间花费的处理配方在化学机械抛光过程中在抛光垫的开槽和未开槽区域预先确定。

7. 发明申请

US20060270231A1 Systems and methods for removing wafer edge residue and debris using a residue remover mechanism 有权
标题翻译：使用残渣去除机构去除晶片边缘残渣和碎屑的系统和方法
公开(公告)号：US20060270231A1
公开(公告)日：2006-11-30
申请号：US11141534
申请日：2005-05-31
申请人： Joe Tran , Brian Kirkpatrick , Alfred Griffin
发明人： Joe Tran , Brian Kirkpatrick , Alfred Griffin
IPC分类号： H01L21/302
CPC分类号： H01L21/02087 , H01L21/02096 , H01L21/67046
摘要： A system (500) removes wafer edge residue from a target wafer (508). A wafer holding mechanism (502) holds and rotates the target wafer (508). A residue remover mechanism (504) mechanically interacts or abrades an edge surface of the target wafer (508) and removes strongly adhered residue from the edge surface of the target wafer (508). The residue remover mechanism (504) controls coverage of the mechanical interaction and magnitude of the mechanical interaction.
摘要翻译：系统（500）从目标晶片（508）去除晶片边缘残留物。晶片保持机构（502）保持并旋转目标晶片（508）。残留物去除机构（504）机械地相互作用或磨蚀目标晶片（508）的边缘表面并从目标晶片（508）的边缘表面去除强粘附的残余物。残留物去除机构（504）控制机械相互作用的覆盖和机械相互作用的大小。

8. 发明申请

US20050095863A1 Chemical mechanical polishing method and apparatus 有权
标题翻译：化学机械抛光方法和设备
公开(公告)号：US20050095863A1
公开(公告)日：2005-05-05
申请号：US10697676
申请日：2003-10-30
申请人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
发明人： Joe Tran , Chad Kaneshige , Brian Kirkpatrick
IPC分类号： B24B37/04 , H01L21/3105 , H01L21/302 , H01L21/461
CPC分类号： B24B37/26 , H01L21/31053
摘要： A method for removing material from the surface of a semiconductor wafer with a chemical mechanical polishing process is described. The method uses a polishing pad on which a line-pattern of grooves is formed. The pattern comprises orderly spaced grooved-area and area without grooves. The method combines information of the surface topography of the wafer, the nature of the material to be removed, and the available groove pattern on the surface of the polishing pad to generate a process recipe in which the resident time of portions of the semiconductor wafer spends at the grooved and un-grooved areas of the polishing pad during the chemical mechanical polishing process is pre-determined.
摘要翻译：描述了通过化学机械抛光工艺从半导体晶片的表面去除材料的方法。该方法使用其上形成有线图案的抛光垫。该图案包括有序间隔的开槽面积和无凹槽的区域。该方法结合了晶片的表面形貌，待去除材料的性质和抛光垫表面上的可用凹槽图案的信息，以产生半导体晶片的部分驻留时间花费的处理配方在化学机械抛光过程中在抛光垫的开槽和未开槽区域预先确定。

9. 发明申请

US20070173047A1 FUSI integration method using SOG as a sacrificial planarization layer 有权
标题翻译：使用SOG作为牺牲平坦化层的FUSI积分方法
公开(公告)号：US20070173047A1
公开(公告)日：2007-07-26
申请号：US11338028
申请日：2006-01-24
申请人： Jiong-Ping Lu , Yaw Obeng , Ping Jiang , Joe Tran
发明人： Jiong-Ping Lu , Yaw Obeng , Ping Jiang , Joe Tran
IPC分类号： H01L21/4763 , H01L21/3205
CPC分类号： H01L21/31055 , H01L21/28097 , H01L21/32134 , H01L29/4975 , H01L29/6656 , H01L29/7833
摘要： A method for making a transistor 20 that includes using a transition metal nitride layer 200 and/or a SOG layer 220 to protect the source/drain regions 60 from silicidation during the silicidation of the gate electrode 90. The SOG layer 210 is planarized to expose the transition metal nitride layer 200 or the gate electrode 93 before the gate silicidation process. If a transition metal nitride layer 200 is used, then it is removed from the top of the gate electrode 93 before the full silicidation of the gate electrode 90.
摘要翻译：制造晶体管20的方法包括使用过渡金属氮化物层200和/或SOG层220来保护源极/漏极区域60在栅电极90的硅化期间不被硅化。在栅极硅化处理之前，SOG层210被平坦化以暴露过渡金属氮化物层200或栅电极93。如果使用过渡金属氮化物层200，则在栅电极90完全硅化之前，从栅电极93的顶部去除它。

10. 发明申请

US20070010062A1 Method to obtain fully silicided poly gate 有权
标题翻译：获得完全硅化多孔的方法
公开(公告)号：US20070010062A1
公开(公告)日：2007-01-11
申请号：US11176725
申请日：2005-07-07
申请人： Freidoon Mehard , Shafoeng Yu , Joe Tran
发明人： Freidoon Mehard , Shafoeng Yu , Joe Tran
IPC分类号： H01L21/336
CPC分类号： H01L21/28097 , H01L29/4975 , H01L29/6656 , H01L29/6659
摘要： The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a spacer material 160 over gate electrodes 150 that are, in turn, located over a microelectronics substrate 110. The gate electrodes 150 have a doped region 170a located between them. A portion of the spacer material 160 is removed with a chemical/mechanical process using a slurry that is selective to a portion of the spacer material 160. The method further comprises etching a remaining portion of the spacer material 163, 165, 168 to form spacer sidewalls 163, 165, 168 on the gate electrodes 150. The etching exposes a surface of the gate electrodes 150 and leaves a portion of the spacer material 168 over the doped region 170a. Metal is then incorporated into the gate electrodes 150 to form silicided gate electrodes 150.
摘要翻译：本发明提供一种制造微电子器件的方法。在一个方面，该方法包括在栅电极150上形成间隔物材料160，栅极150又位于微电子基板110上方。栅电极150具有位于它们之间的掺杂区域170a。使用对间隔材料160的一部分有选择性的浆料，通过化学/机械方法去除间隔物材料160的一部分。该方法还包括蚀刻间隔物材料163,165,168的剩余部分以形成间隔物栅极电极150上的侧壁163,165,168。蚀刻暴露栅电极150的表面，并将间隔材料168的一部分留在掺杂区域170a上。然后将金属结合到栅电极150中以形成硅化栅电极150。

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