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1. 发明授权

US08243497B1 Phase change memory device with reduced programming disturbance 有权
标题翻译：相变存储器，减少编程干扰
公开(公告)号：US08243497B1
公开(公告)日：2012-08-14
申请号：US12628153
申请日：2009-11-30
申请人： Fabio Pellizzer , Agostino Pirovano , Augusto Benvenuti , Daniele Vimercati , Andrea Redaelli , Gerald Barkley
发明人： Fabio Pellizzer , Agostino Pirovano , Augusto Benvenuti , Daniele Vimercati , Andrea Redaelli , Gerald Barkley
IPC分类号： G11C11/00
CPC分类号： G11C8/14 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0033 , G11C13/0038 , G11C13/0069 , G11C2013/0071 , G11C2013/008 , G11C2213/79
摘要： A Phase Change Memory device with reduced programming disturbance and its operation are described. The Phase Change Memory includes an array with word lines and bit lines and voltage controlling elements coupled to bit lines adjacent to an addressed bit line to maintain the voltage of the adjacent bit lines within an allowed range.
摘要翻译：描述了具有减少的编程干扰及其操作的相变存储器件。相变存储器包括具有字线和位线的阵列，以及耦合到与寻址位线相邻的位线的电压控制元件，以将相邻位线的电压维持在允许的范围内。

2. 发明授权

US08358532B2 Word-line driver including pull-up resistor and pull-down transistor 有权
标题翻译：字线驱动器，包括上拉电阻和下拉晶体管
公开(公告)号：US08358532B2
公开(公告)日：2013-01-22
申请号：US12621933
申请日：2009-11-19
申请人： Fabio Pellizzer , Agostino Pirovano , Andrea Redaelli , Daniele Vimercati
发明人： Fabio Pellizzer , Agostino Pirovano , Andrea Redaelli , Daniele Vimercati
IPC分类号： G11C11/00 , G11C8/08 , H01S4/00
CPC分类号： G11C8/08 , G11C13/0004 , G11C13/0028 , G11C13/003 , G11C16/08 , G11C2213/79 , Y10T29/49002
摘要： Embodiments include but are not limited to apparatuses and systems including a plurality of memory cells, each memory cell including a selector and a storage element coupled to the selector. A word-line may be coupled to the memory cells and may have a word-line driver including a pull-up resistor coupled to the selectors for the memory cells to access respective storage elements of the memory cells. Other embodiments may be described and claimed.
摘要翻译：实施例包括但不限于包括多个存储单元的装置和系统，每个存储单元包括选择器和耦合到选择器的存储元件。字线可以耦合到存储器单元，并且可以具有字线驱动器，其包括耦合到用于存储器单元的选择器的上拉电阻以访问存储器单元的相应存储元件。可以描述和要求保护其他实施例。

3. 发明申请

US20100165724A1 WORD-LINE DRIVER INCLUDING PULL-UP RESISTOR AND PULL-DOWN TRANSISTOR 有权
标题翻译：字线驱动器，包括上拉电阻和上拉晶体管
公开(公告)号：US20100165724A1
公开(公告)日：2010-07-01
申请号：US12621933
申请日：2009-11-19
申请人： Fabio Pellizzer , Agostino Pirovano , Andrea Redaelli , Daniele Vimercati
发明人： Fabio Pellizzer , Agostino Pirovano , Andrea Redaelli , Daniele Vimercati
IPC分类号： G11C11/00 , G11C8/08 , H01S4/00
CPC分类号： G11C8/08 , G11C13/0004 , G11C13/0028 , G11C13/003 , G11C16/08 , G11C2213/79 , Y10T29/49002
摘要： Embodiments include but are not limited to apparatuses and systems including a plurality of memory cells, each memory cell including a selector and a storage element coupled to the selector. A word-line may be coupled to the memory cells and may have a word-line driver including a pull-up resistor coupled to the selectors for the memory cells to access respective storage elements of the memory cells. Other embodiments may be described and claimed.
摘要翻译：实施例包括但不限于包括多个存储单元的装置和系统，每个存储单元包括选择器和耦合到选择器的存储元件。字线可以耦合到存储器单元，并且可以具有字线驱动器，其包括耦合到用于存储器单元的选择器的上拉电阻以访问存储器单元的相应存储元件。可以描述和要求保护其他实施例。

4. 发明授权

US08908414B2 Modified reset state for enhanced read margin of phase change memory 有权
标题翻译：修改复位状态，提高相变存储器的读余量
公开(公告)号：US08908414B2
公开(公告)日：2014-12-09
申请号：US13512006
申请日：2009-12-18
申请人： Mattia Boniardi , Andrea Redaelli , Fabio Pellizzer , Daniele Ielmini , Agostino Pirovano
发明人： Mattia Boniardi , Andrea Redaelli , Fabio Pellizzer , Daniele Ielmini , Agostino Pirovano
IPC分类号： G11C11/00 , G11C13/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0064 , G11C13/0097 , G11C2013/009 , G11C2013/0092
摘要： Subject matter disclosed herein relates to techniques involving a structural relaxation (SR) phenomenon for increasing resistance of a Reset state of phase change memory.
摘要翻译：本文公开的主题涉及涉及用于增加相变存储器的复位状态的电阻的结构松弛（SR）现象的技术。

5. 发明申请

US20130107618A1 MODIFIED RESET STATE FOR ENHANCED READ MARGIN OF PHASE CHANGE MEMORY 有权
公开(公告)号：US20130107618A1
公开(公告)日：2013-05-02
申请号：US13512006
申请日：2009-12-18
申请人： Mattia Boniardi , Andrea Redaelli , Fabio Pellizzer , Daniele Ielmini , Agostino Pirovano
发明人： Mattia Boniardi , Andrea Redaelli , Fabio Pellizzer , Daniele Ielmini , Agostino Pirovano
IPC分类号： G11C13/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0064 , G11C13/0097 , G11C2013/009 , G11C2013/0092
摘要： Subject matter disclosed herein relates to techniques involving a structural relaxation (SR) phenomenon for increasing resistance of a Reset state of phase change memory.

6. 发明申请

US20100078619A1 RESISTIVE MEMORY CELL AND METHOD FOR MANUFACTURING A RESISTIVE MEMORY CELL 审中-公开
标题翻译：电阻记忆体和制造电阻记忆体的方法
公开(公告)号：US20100078619A1
公开(公告)日：2010-04-01
申请号：US12570256
申请日：2009-09-30
申请人： Andrea Redaelli , Fabio Pellizzer , Agostino Pirovano
发明人： Andrea Redaelli , Fabio Pellizzer , Agostino Pirovano
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/24
摘要： A resistive memory cell includes a structural layer, a pore in the structural layer, a selector, having a coupling terminal accommodated in the pore, and a storage element of a resistive memory material, arranged in the pore and electrically coupled to the coupling terminal of the selector. The storage element has a tubular portion, extending transversely to an electrical coupling interface of the coupling terminal.
摘要翻译：电阻式存储单元包括结构层，结构层中的孔，具有容纳在孔中的耦合端的选择器和电阻式存储材料的存储元件，布置在孔中并电耦合到选择器。存储元件具有管状部分，横向于耦合端子的电耦合接口延伸。

7. 发明申请

US20100308296A1 PHASE CHANGE MEMORY CELL WITH SELF-ALIGNED VERTICAL HEATER 审中-公开
标题翻译：相位改变记忆单元与自对准垂直加热器
公开(公告)号：US20100308296A1
公开(公告)日：2010-12-09
申请号：US12481496
申请日：2009-06-09
申请人： Agostino Pirovano , Giorgio Servalli , Fabio Pellizzer , Andrea Redaelli
发明人： Agostino Pirovano , Giorgio Servalli , Fabio Pellizzer , Andrea Redaelli
IPC分类号： H01L45/00 , H01L21/28
CPC分类号： H01L45/06 , H01L27/2445 , H01L27/2463 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A self-aligned vertical heater element is deposited directly on the silicide of a selection device, and a phase change chalcogenide material is deposited directly on the vertical heater element. The fabrication process allows for self-alignment between the chalcogenide line and vertical heater element. In an embodiment, the vertical heater element is L-shaped, having a vertical wall along the wordline direction and a horizontal base. The vertical wall and the horizontal base may have the same thickness.
摘要翻译：自对准垂直加热元件直接沉积在选择装置的硅化物上，相变硫族化物材料直接沉积在垂直加热元件上。制造工艺允许硫族化物管线和垂直加热器元件之间的自对准。在一个实施例中，垂直加热器元件是L形的，具有沿字线方向的垂直壁和水平底座。垂直壁和水平底座可以具有相同的厚度。

8. 发明授权

US08084789B2 Phase change memory with ovonic threshold switch 有权
标题翻译：相位变化记忆体带有超声门限开关
公开(公告)号：US08084789B2
公开(公告)日：2011-12-27
申请号：US12700440
申请日：2010-02-04
申请人： Fabio Pellizzer , Agostino Pirovano
发明人： Fabio Pellizzer , Agostino Pirovano
IPC分类号： H01L29/76
CPC分类号： H01L45/06 , H01L27/2427 , H01L27/2463 , H01L45/1233 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/1675
摘要： A phase change memory includes a memory element and a selection element. The memory element is embedded in a dielectric and includes a resistive element having at least one sublithographic dimension and a storage region in contact with the resistive element. The selection element includes a chalcogenic material embedded in a dielectric. The chalcogenic material and the storage region are part of a stack having a common etched edge.
摘要翻译：相变存储器包括存储元件和选择元件。存储元件嵌入在电介质中，并且包括具有至少一个亚光刻尺寸的电阻元件和与电阻元件接触的存储区域。选择元件包括埋在电介质中的硫属材料。硫属材料和存储区域是具有共同蚀刻边缘的堆叠的一部分。

9. 发明授权

US07898848B2 Memory including bipolar junction transistor select devices 有权
标题翻译：存储器包括双极结型晶体管选择器件
公开(公告)号：US07898848B2
公开(公告)日：2011-03-01
申请号：US11788909
申请日：2007-04-23
申请人： Agostino Pirovano , Fabio Pellizzer
发明人： Agostino Pirovano , Fabio Pellizzer
IPC分类号： G11C11/00
CPC分类号： H01L29/735 , G11C13/0004 , G11C13/003 , G11C2213/76 , G11C2213/79 , H01L27/0207 , H01L27/1022 , H01L27/24
摘要： An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.
摘要翻译：阵列由多个单元形成，其中每个单元由具有第一，第二和控制区域的双极结选择晶体管形成。单元包括形成选择晶体管的第二区域的公共区域和覆盖在公共区域上的多个共享控制区域。每个共享控制区域形成多个相邻选择晶体管的控制区域并且容纳多个相邻选择晶体管的第一区域以及共享控制区域的接触部分。多个选择晶体管的相邻选择晶体管的块共享接触部分，并且沿着两个接触部分之间的共享控制区域布置相邻选择晶体管的块的第一区域。在相邻选择晶体管的第一区域对之间形成多个偏置结构，用于修改偏置结构下方的共享控制区域中的电荷分布。

10. 发明授权

US07515460B2 Multilevel programming of phase change memory cells 有权
标题翻译：相变存储器单元的多级编程
公开(公告)号：US07515460B2
公开(公告)日：2009-04-07
申请号：US11606762
申请日：2006-11-30
申请人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
发明人： George Gordon , Stephen Hudgens , Fabio Pellizzer , Agostino Pirovano
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0083 , G11C2213/79
摘要： A method for programming a phase change memory cell is discussed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states, in which the phase change material includes both crystalline regions and amorphous regions and has intermediate resistance levels. According to the method, a plurality of programming pulses are provided to the phase change memory cell; programming energies respectively associated to the programming pulses are lower than a threshold energy which is required to bring the phase change material to the second state.
摘要翻译：讨论了一种编程相变存储单元的方法。相变存储单元包括具有第一状态的相变材料的存储元件，其中所述相变材料是晶体并且具有最小电阻水平，所述相变材料是非晶态且具有最大电阻的第二状态电平和多个中间状态，其中相变材料包括结晶区域和非晶区域并具有中等电阻水平。根据该方法，向相变存储单元提供多个编程脉冲; 分别与编程脉冲相关联的编程能量低于使相变材料进入第二状态所需的阈值能量。

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