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    • 2. 发明申请
    • Input circuit
    • 输入电路
    • US20040135598A1
    • 2004-07-15
    • US10750911
    • 2004-01-05
    • FUJITSU LIMITED
    • Tomohiko Koto
    • H03K005/22
    • H03K5/2481H03F2200/282H03F2200/291H03F2203/7203H03F2203/7224H03K19/0016H03K19/00315H03K19/018528
    • An input circuit for preventing the application of a voltage exceeding a transistor withstand voltage when the input circuit is switched to a standby state. The input circuit includes a first differential amplification circuit powered by a first power supply to amplify a first input signal and generate a second input signal. A level shift circuit is powered by the first power supply to generate a shifted input signal from the second input signal. A second differential amplification circuit is powered by a second power supply to amplify the shifted input signal and generate an amplified signal. A current control circuit selectively switches the input circuit between activated and standby states. A first circuit charges or discharges the level shift circuit so that voltage of the shifted input signal is less than or equal to voltage of the second power supply when switched to the standby state.
    • 一种用于在输入电路切换到待机状态时防止施加超过晶体管耐受电压的电压的输入电路。 输入电路包括由第一电源供电以放大第一输入信号并产生第二输入信号的第一差分放大电路。 电平移位电路由第一电源供电以从第二输入信号产生移位的输入信号。 第二差分放大电路由第二电源供电以放大经移位的输入信号并产生放大信号。 电流控制电路有选择地将输入电路切换到激活状态和待机状态之间。 第一电路对电平移位电路进行充电或放电,使得当切换到待机状态时,移位的输入信号的电压小于或等于第二电源的电压。