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1. 发明申请

US20020079973A1 Automatic bias adjustment circuit for use in PLL circuit 有权
标题翻译：用于PLL电路的自动偏置调整电路
公开(公告)号：US20020079973A1
公开(公告)日：2002-06-27
申请号：US09988618
申请日：2001-11-20
申请人： FUJITSU LIMITED
发明人： Hirohito Higashi , Hideki Ishida
IPC分类号： H03L007/00
CPC分类号： H03L7/0805 , H03L1/022 , H03L7/0893 , H03L7/10 , H03L7/189
摘要： A bias current IB additionally provided to a current-controlled circuit 13 in a PLL circuit is the sum of bias currents IB1 and IB2 which are generated by a bias adjustment circuit (18, 19, 20, 21 and 22) and a bias current generating circuit (23 and 24), respectively. The bias adjustment circuit adjusts the bias current IB1 in response to an adjustment start signal ADJ such that a control voltage VC converges to a reference voltage VREF, and ceases the adjustment when the convergence has been achieved. The reference voltage VREF is determined to be a value at an almost middle point in a range of the variable VC in the PLL circuit. The bias current generating circuit has a circuit 23 generating a bias voltage VT and a circuit 24 converting the VT into a current IB2, wherein the temperature characteristic of the bias voltage VT is reverse to that of the control voltage VC under the condition that the frequency of an oscillation signal OCLK is fixed.
摘要翻译：另外提供给PLL电路中的电流控制电路13的偏置电流IB是由偏置调整电路（18,19,20,21和22）产生的偏置电流IB1和IB2的和，并产生偏置电流电路（23和24）。偏置调整电路响应于调节开始信号ADJ调节偏置电流IB1，使得控制电压VC收敛到参考电压VREF，并且在已经达到收敛时停止调整。参考电压VREF被确定为在PLL电路中的变量VC的范围内的几乎中点处的值。偏置电流产生电路具有产生偏置电压VT的电路23和将VT转换成电流IB2的电路24，其中偏置电压VT的温度特性与控制电压VC的温度特性相反，的振荡信号OCLK是固定的。

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