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1. 发明授权

US06815270B2 Thin film transistor formed by an etching process with high anisotropy 有权
标题翻译：通过具有高各向异性的蚀刻工艺形成的薄膜晶体管
公开(公告)号：US06815270B2
公开(公告)日：2004-11-09
申请号：US10438725
申请日：2003-05-15
申请人： Takatoshi Tsujimura , Masatomo Takeichi , Kai R. Schleupen , Evan G. Colgan
发明人： Takatoshi Tsujimura , Masatomo Takeichi , Kai R. Schleupen , Evan G. Colgan
IPC分类号： H01L2100
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1248 , H01L29/66765 , Y10S438/90
摘要： The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
摘要翻译：本发明公开了一种薄膜晶体管及其通过高各向异性蚀刻工艺形成的方法。根据本发明的薄膜晶体管包括晶体管元件，其包括栅极电极，栅极绝缘层，半导体层以及源极和漏极电极; 钝化层沉积在层上并具有用于接触孔的第一开口; 以及与所述钝化层一起延伸并具有用于所述接触孔的第二开口的层间绝缘体，所述第一开口和所述第二开口在所述衬底上彼此对准，其中导电层沉积在所述接触孔的内壁上，并且内壁由第一和第二开口形成，其平滑且连续地通过各向异性蚀刻工艺而逐渐变细。

2. 发明授权

US06713786B2 Thin film transistors with self-aligned transparent pixel electrode 有权
标题翻译：具有自对准透明像素电极的薄膜晶体管
公开(公告)号：US06713786B2
公开(公告)日：2004-03-30
申请号：US10348288
申请日：2003-01-21
申请人： Evan G. Colgan , Kai R. Schleupen , Takatoshi Tsujimura
发明人： Evan G. Colgan , Kai R. Schleupen , Takatoshi Tsujimura
IPC分类号： H01L2904
CPC分类号： G02F1/136227 , G02F1/1368
摘要： A pixel cell has a thin film transistor structure formed on a substrate. A signal conductor is patterned on the thin film transistor structure, and a first patterned layer of a transparent conductive material covers the signal conductor. The first patterned layer provides a pattern employed in etching a channel region of the thin film transistor structure. A dielectric layer is formed over the pixel cell and includes a via hole down to the first patterned layer of the transparent conductive material. A second layer of transparent conductive material extends through the via hole to contact the first patterned layer wherein the second layer is self-aligned to the transistor structure.
摘要翻译：像素单元具有形成在基板上的薄膜晶体管结构。在薄膜晶体管结构上图形化信号导体，并且透明导电材料的第一图案化层覆盖信号导体。第一图案化层提供了在蚀刻薄膜晶体管结构的沟道区域中使用的图案。介电层形成在像素单元的上方，并且包括通向透明导电材料的第一图案化层的通孔。第二层透明导电材料延伸穿过通孔以接触第一图案化层，其中第二层与晶体管结构自对准。

3. 发明授权

US06511869B2 Thin film transistors with self-aligned transparent pixel electrode 有权
公开(公告)号：US06511869B2
公开(公告)日：2003-01-28
申请号：US09730218
申请日：2000-12-05
申请人： Evan G. Colgan , Kai R. Schleupen , Takatoshi Tsujimura
发明人： Evan G. Colgan , Kai R. Schleupen , Takatoshi Tsujimura
IPC分类号： H01L2100
CPC分类号： G02F1/136227 , G02F1/1368
摘要： A pixel cell has a thin film transistor structure formed on a substrate. A signal conductor is patterned on the thin film transistor structure, and a first patterned layer of a transparent conductive material covers the signal conductor. The first patterned layer provides a pattern employed in etching a channel region of the thin film transistor structure. A dielectric layer is formed over the pixel cell and includes a via hole down to the first patterned layer of the transparent conductive material. A second layer of transparent conductive material extends through the via hole to contact the first patterned layer wherein the second layer is self-aligned to the transistor structure.

4. 发明授权

US06693297B2 Thin film transistor formed by an etching process with high anisotropy 有权
公开(公告)号：US06693297B2
公开(公告)日：2004-02-17
申请号：US09884726
申请日：2001-06-18
申请人： Takatoshi Tsujimura , Masatomo Takeichi , Kai R. Schleupen , Evan G. Colgan
发明人： Takatoshi Tsujimura , Masatomo Takeichi , Kai R. Schleupen , Evan G. Colgan
IPC分类号： H01L2904
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1248 , H01L29/66765 , Y10S438/90
摘要： The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.

5. 发明授权

US06256080B1 Self-aligned structures for improved wide viewing angle for liquid crystal displays 有权
标题翻译：自对准结构，用于改善液晶显示器的广视角
公开(公告)号：US06256080B1
公开(公告)日：2001-07-03
申请号：US09339262
申请日：1999-06-23
申请人： Evan G. Colgan , Shui-Chih A. Lien , Kai R. Schleupen
发明人： Evan G. Colgan , Shui-Chih A. Lien , Kai R. Schleupen
IPC分类号： G02F11337
CPC分类号： G02F1/133753 , G02F1/133512 , G02F1/133707
摘要： In accordance with the present invention, a liquid crystal display cell includes a first substrate having a light absorbent material patterned thereon. The light absorbent material includes a portion disposed within a pixel area. A conductive layer is formed on the light absorbent material for forming a first transparent electrode. A second electrode is spaced apart from the first electrode by a gap. The gap includes liquid crystal. A ridge or a trench is formed in the pixel area and projects into the liquid crystal. The ridge or trench is self-aligned to the portions of the light absorbent material in the pixel area. The first electrode and the second electrode provide an electric field therebetween wherein the ridge or trench provides pretilt control for the liquid crystal to provide an improved wide viewing angle and the portions of the light absorbent material absorb light leaked from the ridge. Other embodiments for active and passive displays are included as well as a method for employing the invention.
摘要翻译：根据本发明，液晶显示单元包括具有图案化的吸光材料的第一基板。吸光材料包括设置在像素区域内的部分。在用于形成第一透明电极的光吸收材料上形成导电层。第二电极通过间隙与第一电极间隔开。间隙包括液晶。在像素区域中形成脊或沟槽并突出到液晶中。脊或沟槽与像素区域中的光吸收材料的部分自对准。第一电极和第二电极在其间提供电场，其中脊或沟槽为液晶提供预先控制以提供改进的宽视角，并且光吸收材料的部分吸收从脊部泄漏的光。包括有源和无源显示器的其它实施例以及采用本发明的方法。

6. 发明授权

US06400440B1 Passive liquid crystal display having pre-tilt control structure and light absorbent material at a center 有权
标题翻译：无源液晶显示器，其中心具有预倾角控制结构和吸光材料
公开(公告)号：US06400440B1
公开(公告)日：2002-06-04
申请号：US09339263
申请日：1999-06-23
申请人： Evan G. Colgan , Shui-Chih A. Lien , Kai R. Schleupen
发明人： Evan G. Colgan , Shui-Chih A. Lien , Kai R. Schleupen
IPC分类号： G02F11337
CPC分类号： G02F1/133707 , G02F1/133512 , G02F1/133753
摘要： In accordance with the present invention, a passive liquid crystal display cell includes a first substrate having a light absorbent material patterned thereon. A first conductive material is formed in a position relative to the light absorbent material for forming one of a data line and a gate line. The position may be over the light absorbent material or below the light absorbent material (and may include transparent layers in between). A second conductive material is spaced apart from the first conductive material by a gap. The gap includes liquid crystal, and the second conductive material forms the other of the data line and the gate line. A pretilt control structure is formed adjacent to the liquid crystal. The gate line and the data line provide an electric field therebetween wherein the pretilt control structure provides pretilt for the liquid crystal to provide a wide viewing angle.
摘要翻译：根据本发明，无源液晶显示单元包括具有图案化的吸光材料的第一基板。第一导电材料形成在相对于吸光材料的位置，用于形成数据线和栅极线之一。该位置可以在吸光材料之上或光吸收材料之下（并且可以包括两者之间的透明层）。第二导电材料通过间隙与第一导电材料间隔开。间隙包括液晶，第二导电材料形成数据线和栅极线中的另一个。与液晶相邻地形成预倾斜的控制结构。栅极线和数据线在其间提供电场，其中预倾斜控制结构为液晶提供预倾斜以提供宽视角。

7. 发明授权

US08954712B2 Computer system including an all-to-all communication network of processors connected using electrical and optical links 有权
标题翻译：计算机系统包括使用电气和光学链路连接的处理器的全对所有通信网络
公开(公告)号：US08954712B2
公开(公告)日：2015-02-10
申请号：US13313145
申请日：2011-12-07
申请人： Evan G. Colgan , Monty M. Denneau , Daniel M. Kuchta
发明人： Evan G. Colgan , Monty M. Denneau , Daniel M. Kuchta
IPC分类号： G06F15/163 , G06F15/173
CPC分类号： H04B10/40 , G06F15/161 , G06F15/163 , G06F15/173 , G06F15/17337 , H04B10/2503 , H04L5/14
摘要： Node Interconnect architectures to implement a high performance supercomputer are provided. For example, a node interconnect architecture for connecting a multitude of nodes (or processors) of a supercomputer is implemented using an all-to-all electrical and optical connection network which provides two independent communication paths between any two processors of the supercomputer, wherein a communication path includes at most two electrical links and one optical link.
摘要翻译：提供节点互连架构来实现高性能超级计算机。例如，用于连接超级计算机的多个节点（或处理器）的节点互连体系架构是使用提供超级计算机的任何两个处理器之间的两个独立通信路径的全对电连接网络来实现的，其中a 通信路径最多包括两个电连接和一个光链路。

8. 发明授权

US08693200B2 Semiconductor device cooling module 有权
标题翻译：半导体器件冷却模块
公开(公告)号：US08693200B2
公开(公告)日：2014-04-08
申请号：US13368031
申请日：2012-02-07
申请人： Evan G. Colgan , Michael A. Gaynes , Jeffrey A. Zitz
发明人： Evan G. Colgan , Michael A. Gaynes , Jeffrey A. Zitz
IPC分类号： H05K7/20
CPC分类号： H01L23/4093 , H01L2924/0002 , H01L2924/00
摘要： A cooling module for cooling a semiconductor is provided and includes a land grid array (LGA) interposer, a substrate with an LGA side and a chip side, a cooler, a load frame attached to the substrate and formed to define an aperture in which the cooler is removably disposable, a spring clamp removably attachable to the load frame and configured to apply force from the load frame to the cooler such that the substrate and the cooler are urged together about the semiconductor and a load assembly device configured to urge the load frame and the LGA interposer together.
摘要翻译：提供了一种用于冷却半导体的冷却模块，其包括平台栅格阵列（LGA）插入器，具有LGA侧和芯片侧的衬底，冷却器，附接到衬底并形成以限定孔径的负载框架冷却器可拆卸地是一次性的，弹簧夹可移除地附接到负载框架并且构造成将力从负载框架施加到冷却器，使得衬底和冷却器围绕半导体被一起被推动在一起;以及负载组件装置，其构造成推动负载框架和LGA插入器在一起。

9. 发明授权

US08569874B2 High memory density, high input/output bandwidth logic-memory structure and architecture 有权
标题翻译：高内存密度，高输入/输出带宽逻辑内存结构和架构
公开(公告)号：US08569874B2
公开(公告)日：2013-10-29
申请号：US13043749
申请日：2011-03-09
申请人： Evan G. Colgan , Monty M. Denneau , Sampath Purushothaman , Klmberley A. Kelly , Roy R. Yu
发明人： Evan G. Colgan , Monty M. Denneau , Sampath Purushothaman , Klmberley A. Kelly , Roy R. Yu
IPC分类号： H01L23/66 , H01L23/64
CPC分类号： G11C5/025 , G11C5/063 , H01L2924/0002 , H01L2924/00
摘要： A chip stack structure includes a logic chip having an active device surface, and memory slices of a memory unit vertically aligned such that a surface of the memory slices is oriented perpendicular to the active device surface of the logic chip. The chip stack structure also includes wiring patterned on an upper surface of the memory slices, the wiring electrically connecting memory leads of the memory slices to logic grids corresponding to logic grid connections of the logic chip.
摘要翻译：芯片堆叠结构包括具有有源器件表面的逻辑芯片和垂直对齐的存储器单元的存储器片，使得存储器片的表面垂直于逻辑芯片的有源器件表面定向。芯片堆叠结构还包括在存储器片的上表面上图案化的布线，布线将存储器片的存储器引线电连接到对应于逻辑芯片的逻辑电路连接的逻辑栅极。

10. 发明申请

US20130091886A1 INTRA-CONDENSER CONTAMINANT EXTRACTOR FOR A VAPOR-COMPRESSION REFRIGERATION APPARATUS 失效
标题翻译：用于蒸气压缩制冷装置的冷凝器污染物萃取器
公开(公告)号：US20130091886A1
公开(公告)日：2013-04-18
申请号：US13271290
申请日：2011-10-12
申请人： Levi A. CAMPBELL , Richard C. CHU , Evan G. Colgan , Milnes P. DAVID , Michael J. ELLSWORTH, JR. , Madhusudan K. IYENGAR , Robert E. SIMONS
发明人： Levi A. CAMPBELL , Richard C. CHU , Evan G. Colgan , Milnes P. DAVID , Michael J. ELLSWORTH, JR. , Madhusudan K. IYENGAR , Robert E. SIMONS
IPC分类号： F25B43/00 , F25D31/00 , B23P15/26
CPC分类号： F25B43/003 , F25B2400/01 , H05K7/20327 , H05K7/20809
摘要： Apparatuses and methods are provided for facilitating cooling of an electronic component. The apparatus includes a vapor-compression refrigeration system. The vapor-compression refrigeration system includes an expansion component, an evaporator, a compressor, and a condenser coupled in fluid communication via a refrigerant flow path. The evaporator is coupled to and cools the electronic component. The apparatus further includes a contaminant extractor coupled in fluid communication with the refrigerant flow path. The extractor includes a refrigerant boiling filter and a heater. At least a portion of refrigerant passing through the refrigerant flow path passes through the refrigerant boiling filter, and the heater provides heat to the refrigerant boiling filter to boil refrigerant passing through the filter. By boiling refrigerant passing through the filter, contaminants are extracted from the refrigerant, and are deposited in the refrigerant boiling filter.
摘要翻译：提供了便于冷却电子部件的装置和方法。该装置包括蒸气压缩制冷系统。蒸汽压缩式制冷系统包括膨胀部件，蒸发器，压缩机以及通过制冷剂流动路径流体连通的冷凝器。蒸发器与电子部件联接并冷却。该装置还包括与制冷剂流动路径流体连通地联接的污染物提取器。提取器包括制冷剂沸腾过滤器和加热器。通过制冷剂流路的制冷剂的至少一部分通过制冷剂沸腾过滤器，并且加热器向制冷剂沸腾过滤器提供热量以沸腾通过过滤器的制冷剂。通过沸腾通过过滤器的制冷剂，污染物从制冷剂中排出，并沉积在制冷剂沸腾过滤器中。

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