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1. 发明申请

US20060275972A1 Method of fabricating CMOS inverters and integrated circuits utilizing strained surface channel MOSFETs 审中-公开
标题翻译：使用应变表面沟道MOSFET制造CMOS反相器和集成电路的方法
公开(公告)号：US20060275972A1
公开(公告)日：2006-12-07
申请号：US11431186
申请日：2006-05-10
申请人： Eugene Fitzgerald , Nicole Gerrish
发明人： Eugene Fitzgerald , Nicole Gerrish
IPC分类号： H01L21/8238
CPC分类号： H01L27/0922 , H01L21/823807 , H01L27/092 , H01L29/1054
摘要： A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained surface layer on said relaxed Si1-xGex layer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said pMOSFET and the channel of the nMOSFET are formed in the strained surface layer. Another embodiment provides a method of fabricating an integrated circuit including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained layer on the relaxed Si1-xGex layer; and forming a p transistor and an n transistor in the heterostructure, wherein the strained layer comprises the channel of the n transistor and the p transistor, and the n transistor and the p transistor interconnected in a CMOS circuit.
摘要翻译：一种制造CMOS反相器的方法，包括提供在Si衬底上具有Si衬底，弛豫的Si 1-x Ge 2 x层的异质结构，以及在Si衬底上的应变表面层所述松弛的Si 1-x Ge x层; 以及将pMOSFET和nMOSFET集成在所述异质结构中，其中所述pMOSFET的沟道和nMOSFET的沟道形成在应变表面层中。另一个实施例提供一种制造集成电路的方法，该集成电路包括提供在Si衬底上具有Si衬底，弛豫的Si 1-x N x Ge x Si层的异质结构和应变层在松弛的Si 1-x Ge层上; 以及在所述异质结构中形成p晶体管和n晶体管，其中所述应变层包括所述n晶体管和所述p晶体管的沟道，并且所述n晶体管和所述p晶体管在CMOS电路中互连。

2. 发明申请

US20050106850A1 Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETs 审中-公开
标题翻译：使用应变表面沟道MOSFET制造CMOS反相器和集成电路的方法
公开(公告)号：US20050106850A1
公开(公告)日：2005-05-19
申请号：US10953260
申请日：2004-09-29
申请人： Eugene Fitzgerald , Nicole Gerrish
发明人： Eugene Fitzgerald , Nicole Gerrish
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/10 , H01L27/108
CPC分类号： H01L27/0922 , H01L21/823807 , H01L27/092 , H01L29/1054
摘要： A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained surface layer on said relaxed Si1-xGex layer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said pMOSFET and the channel of the nMOSFET are formed in the strained surface layer. Another embodiment provides a method of fabricating an integrated circuit including providing a heterostructure having a Si substrate, a relaxed Si1-xGex layer on the Si substrate, and a strained layer on the relaxed Si1-xGex layer; and forming a p transistor and an n transistor in the heterostructure, wherein the strained layer comprises the channel of the n transistor and the p transistor, and the n transistor and the p transistor are interconnected in a CMOS circuit.
摘要翻译：一种制造CMOS反相器的方法，包括提供在Si衬底上具有Si衬底，弛豫的Si 1-x Ge 2 x层的异质结构，以及在Si衬底上的应变表面层所述松弛的Si 1-x Ge x层; 以及将pMOSFET和nMOSFET集成在所述异质结构中，其中所述pMOSFET的沟道和nMOSFET的沟道形成在应变表面层中。另一个实施例提供一种制造集成电路的方法，该集成电路包括提供在Si衬底上具有Si衬底，弛豫的Si 1-x N x Ge x Si层的异质结构和应变层在松弛的Si 1-x Ge层上; 以及在所述异质结构中形成p晶体管和n晶体管，其中所述应变层包括所述n晶体管和所述p晶体管的沟道，并且所述n晶体管和所述p晶体管在CMOS电路中互连。

3. 发明授权

US07884353B2 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same 有权
标题翻译：使用具有限定杂质梯度的应变材料层的半导体结构及其制造方法
公开(公告)号：US07884353B2
公开(公告)日：2011-02-08
申请号：US10972578
申请日：2004-10-25
申请人： Matthew Currie , Anthony Lochtefeld , Richard Hammond , Eugene Fitzgerald
发明人： Matthew Currie , Anthony Lochtefeld , Richard Hammond , Eugene Fitzgerald
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L29/105 , H01L29/161 , H01L29/36 , H01L29/66477 , H01L29/66545 , H01L29/66651 , H01L29/78 , H01L29/7842 , Y10S438/926
摘要： Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
摘要翻译：包括具有无杂质区域的应变材料层的半导体结构和器件及其制造方法。应变材料层的某些区域保持没有可以从半导体的相邻部分相互扩散的杂质。当杂质存在于应变材料层的某些区域中时，器件性能下降。通过采用具有所描述或者根据所描述的步骤制造的特征的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作被增强。

4. 发明申请

US20070252223A1 Insulated gate devices and method of making same 审中-公开
标题翻译：绝缘栅极器件及其制造方法
公开(公告)号：US20070252223A1
公开(公告)日：2007-11-01
申请号：US11634430
申请日：2006-12-05
申请人： Minjoo Lee , Eugene Fitzgerald
发明人： Minjoo Lee , Eugene Fitzgerald
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/0605 , H01L21/8252 , H01L29/2003 , H01L29/432 , H01L29/513 , H01L29/517 , H01L29/66522 , H01L29/802 , H01L2924/0002 , H01L2924/00
摘要： Structures and devices, and methods of making such structures and devices, including a gate dielectric layer are provided. A semiconductor structure can include a semiconductor channel layer including a nitride-free semiconductor layer and a gate dielectric layer including a group III-nitride layer, wherein the gate dielectric layer is disposed over the semiconductor channel layer. A method of making a semiconductor device structure is also provided. The method includes providing a semiconductor channel layer including a nitride-free semiconductor layer and providing a gate dielectric layer including a group III-nitride layer, wherein the gate dielectric layer is disposed over the semiconductor channel layer. A metal-insulator-semiconductor field effect transistor (MISFIT) device structure can include a semiconductor channel layer including a nitride-free semiconductor layer and a gate dielectric layer comprising a group III-nitride layer, wherein the gate dielectric layer is disposed over the semiconductor channel layer. The MISFIT may include a gate electrode disposed over the gate dielectric. The MISFIT may include a source and drain region separated by the semiconductor channel layer.
摘要翻译：提供了包括栅极电介质层的结构和器件以及制造这种结构和器件的方法。半导体结构可以包括包括无氮化物半导体层的半导体沟道层和包括III族氮化物层的栅极电介质层，其中栅极介电层设置在半导体沟道层上。还提供了制造半导体器件结构的方法。该方法包括提供包括无氮化物的半导体层并提供包括III族氮化物层的栅介质层的半导体沟道层，其中栅介质层设置在半导体沟道层上。金属 - 绝缘体 - 半导体场效应晶体管（MISFIT）器件结构可以包括包括无氮化物的半导体层的半导体沟道层和包括III族氮化物层的栅极电介质层，其中栅极电介质层设置在半导体通道层。 MISFIT可以包括设置在栅极电介质上方的栅电极。 MISFIT可以包括由半导体沟道层分离的源极和漏极区域。

5. 发明申请

US20060197124A1 Double gate strained-semiconductor-on-insulator device structures 审中-公开
标题翻译：双栅极半导体绝缘体上的器件结构
公开(公告)号：US20060197124A1
公开(公告)日：2006-09-07
申请号：US11415706
申请日：2006-05-01
申请人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Glyn Braithwaite , Eugene Fitzgerald
发明人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Glyn Braithwaite , Eugene Fitzgerald
IPC分类号： H01L21/8234 , H01L29/76 , H01L31/00
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

6. 发明申请

US20060174818A1 Method of producing high quality relaxed silicon germanium layers 有权
公开(公告)号：US20060174818A1
公开(公告)日：2006-08-10
申请号：US11371442
申请日：2006-03-09
申请人： Eugene Fitzgerald , Richard Westhoff , Matthew Currie , Christopher Vineis , Thomas Langdo
发明人： Eugene Fitzgerald , Richard Westhoff , Matthew Currie , Christopher Vineis , Thomas Langdo
IPC分类号： C30B1/00 , C30B28/02 , C30B3/00 , C30B5/00
CPC分类号： C30B29/52 , C23C16/029 , C23C16/22 , C23C16/4401 , C30B25/02 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/0262
摘要： A method for minimizing particle generation during deposition of a graded Si1-xGex layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si1-xGex layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm2 on the substrate.

7. 发明申请

US20060148225A1 Methods for fabricating strained layers on semiconductor substrates 有权
公开(公告)号：US20060148225A1
公开(公告)日：2006-07-06
申请号：US11362892
申请日：2006-02-27
申请人： Eugene Fitzgerald , Matthew Currie
发明人： Eugene Fitzgerald , Matthew Currie
IPC分类号： H01L21/28 , H01L21/31
CPC分类号： C30B29/52 , C30B25/02 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L21/2205
摘要： Methods for fabricating multi-layer semiconductor structures including strained material layers using a minimum number of process tools and under conditions optimized for each layer. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

8. 发明申请

US20050280103A1 Strained-semiconductor-on-insulator finFET device structures 有权
标题翻译：应变半导体绝缘体finFET器件结构
公开(公告)号：US20050280103A1
公开(公告)日：2005-12-22
申请号：US11211933
申请日：2005-08-25
申请人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
发明人： Thomas Langdo , Matthew Currie , Glyn Braithwaite , Richard Hammond , Anthony Lochtefeld , Eugene Fitzgerald
IPC分类号： H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/785 , H01L21/76254 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/66772 , H01L29/66795 , H01L29/66916 , H01L29/7842 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

9. 发明申请

US20050280026A1 Strained silicon-on-silicon by wafer bonding and layer transfer 有权
标题翻译：通过晶片接合和层转移来应变硅上硅
公开(公告)号：US20050280026A1
公开(公告)日：2005-12-22
申请号：US10869814
申请日：2004-06-16
申请人： David Isaacson , Eugene Fitzgerald
发明人： David Isaacson , Eugene Fitzgerald
IPC分类号： H01L21/18 , H01L21/3205 , H01L31/0328
CPC分类号： H01L21/187
摘要： A semiconductor-based structure includes first and second layers bonded directly to each other at an interface. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. The first and second layers are each formed of essentially the same semiconductor. A method for making a semiconductor-based structure includes providing first and second layers that are formed of essentially the same semiconductor. The first and second layers have, respectively, first and second surfaces. The second layer has a different lattice spacing parallel to the second surface than the lattice spacing of the first layer parallel to the first surface. The method includes contacting the first and second surfaces, and annealing to promote direct atomic bonding between the first and second layers.
摘要翻译：基于半导体的结构包括在界面处彼此直接结合的第一和第二层。平行于界面，第二层的晶格间距不同于第一层的晶格间距。第一层和第二层各自由基本上相同的半导体形成。制造基于半导体的结构的方法包括提供由基本相同的半导体形成的第一和第二层。第一和第二层分别具有第一和第二表面。第二层具有与第一层平行于第一表面的晶格间隔平行于第二表面的不同晶格间距。该方法包括使第一和第二表面接触，退火以促进第一和第二层之间的直接原子结合。

10. 发明申请

US20050199954A1 Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain 有权
标题翻译：通过机械诱导应变形成绝缘体上半导体器件结构的方法
公开(公告)号：US20050199954A1
公开(公告)日：2005-09-15
申请号：US11128628
申请日：2005-05-13
申请人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Eugene Fitzgerald
发明人： Anthony Lochtefeld , Thomas Langdo , Richard Hammond , Matthew Currie , Eugene Fitzgerald
IPC分类号： H01L21/20 , H01L21/331 , H01L21/336 , H01L21/337 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01 , H01L21/425
CPC分类号： H01L29/7847 , H01L21/28518 , H01L21/76254 , H01L21/76256 , H01L21/76259 , H01L21/76264 , H01L21/76275 , H01L21/84 , H01L27/1203 , H01L29/0649 , H01L29/1033 , H01L29/165 , H01L29/41783 , H01L29/66242 , H01L29/66628 , H01L29/66772 , H01L29/66787 , H01L29/66916 , H01L29/7842 , H01L29/7843 , H01L29/7849 , H01L29/785 , H01L29/78603 , H01L29/78684 , H01L29/78687
摘要： The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
摘要翻译：应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

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