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1. 发明申请

US20120313736A1 ON-CHIP SLOW-WAVE THROUGH-SILICON VIA COPLANAR WAVEGUIDE STRUCTURES, METHOD OF MANUFACTURE AND DESIGN STRUCTURE 有权
标题翻译：通过共振波导结构的芯片上的慢波通孔，制造方法和设计结构
公开(公告)号：US20120313736A1
公开(公告)日：2012-12-13
申请号：US13156935
申请日：2011-06-09
申请人： Essam F. MINA , Guoan WANG , Wayne H. WOODS, JR.
发明人： Essam F. MINA , Guoan WANG , Wayne H. WOODS, JR.
IPC分类号： H01P3/08 , G06F17/50 , H01L21/768
CPC分类号： H01L23/481 , H01L2924/0002 , H01P3/003 , H01L2924/00
摘要： On-chip high performance slow-wave coplanar waveguide through-silicon via structures, method of manufacture and design structures for integrated circuits are provided herein. The method includes forming at least one ground plane layer in a substrate and forming a signal layer in the substrate, in a same plane layer as the at least one ground. The method further includes forming at least one metal filled through-silicon via between the at least one ground plane layer and the signal layer.
摘要翻译：本文提供片上高性能慢波共面波导通硅结构，制造方法和集成电路设计结构。该方法包括在衬底中形成至少一个接地平面层，并在与该至少一个接地相同的平面层中在衬底中形成信号层。该方法还包括在至少一个接地层与信号层之间形成至少一个填充有金属的硅，

2. 发明申请

US20130127564A1 RECONFIGURABLE WILKINSON POWER DIVIDER AND DESIGN STRUCTURE THEREOF 有权
标题翻译：可重新配置的威林逊功率分配器及其设计结构
公开(公告)号：US20130127564A1
公开(公告)日：2013-05-23
申请号：US13298489
申请日：2011-11-17
申请人： Hanyi DING , Guoan WANG , Wayne H. WOODS, JR. , Jiansheng XU
发明人： Hanyi DING , Guoan WANG , Wayne H. WOODS, JR. , Jiansheng XU
IPC分类号： H01P5/12
CPC分类号： H01P5/16
摘要： A reconfigurable Wilkinson power divider, methods of manufacture and design structures are provided. The structure includes a first port, and a first arm and a second arm connected to the first port. The first arm and the second arm each include one or more tunable t-line circuits. The structure also includes a second port and a third port connected to the first port via the first arm and second arm, respectively.
摘要翻译：提供可重构的Wilkinson功率分配器，制造和设计结构的方法。该结构包括第一端口和连接到第一端口的第一臂和第二臂。第一臂和第二臂各包括一个或多个可调t线电路。该结构还包括分别经由第一臂和第二臂连接到第一端口的第二端口和第三端口。

3. 发明申请

US20120102444A1 ON-CHIP TUNABLE TRANSMISSION LINES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES 有权
标题翻译：片上导线传输线，制造方法和设计结构
公开(公告)号：US20120102444A1
公开(公告)日：2012-04-26
申请号：US12911327
申请日：2010-10-25
申请人： Hanyi DING , Guoan WANG , Wayne H. WOODS, JR.
发明人： Hanyi DING , Guoan WANG , Wayne H. WOODS, JR.
IPC分类号： G06F17/50 , H01R43/00 , H03K17/687
CPC分类号： H01P3/08 , H01P1/15 , Y10T29/49117
摘要： An on-chip tunable transmission line (t-line), methods of manufacture and design structures are provided. The structure includes a tunable transmission line (t-line) with fixed characteristic impedance comprising functionally-differentiated switches used for inductance and capacitance, respectively.
摘要翻译：提供片上可调输电线（t线），制造方法和设计结构。该结构包括具有固定特性阻抗的可调传输线（t线），分别包括用于电感和电容的功能差分开关。

4. 发明申请

US20110037533A1 METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR AN IMPEDANCE-OPTIMIZED MICROSTRIP TRANSMISSION LINE FOR MULTI-BAND AND ULTRA-WIDE BAND APPLICATIONS 有权
标题翻译：用于多带和超宽带应用的阻抗优化微波传输线的方法，结构和设计结构
公开(公告)号：US20110037533A1
公开(公告)日：2011-02-17
申请号：US12542368
申请日：2009-08-17
申请人： Guoan WANG , Wayne H. WOODS, JR.
发明人： Guoan WANG , Wayne H. WOODS, JR.
IPC分类号： H03H7/38 , G06F17/50
CPC分类号： H01P3/081 , H01P3/006
摘要： A method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications. A method includes: forming a plurality of openings in a ground plane associated with a signal line; forming a plurality of capacitance plates in the plurality of openings; and connecting the plurality of capacitance plates to the signal line with a plurality of posts extending between the signal line and the plurality of capacitance plates.
摘要翻译：用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构。一种方法包括：在与信号线相关联的接地平面中形成多个开口; 在所述多个开口中形成多个电容板; 以及在所述信号线与所述多个电容板之间延伸的多个支柱将所述多个电容板连接到所述信号线。

5. 发明申请

US20100265007A1 ON CHIP SLOW-WAVE STRUCTURE, METHOD OF MANUFACTURE AND DESIGN STRUCTURE 有权
标题翻译：在芯片缓冲结构，制造和设计结构的方法
公开(公告)号：US20100265007A1
公开(公告)日：2010-10-21
申请号：US12423835
申请日：2009-04-15
申请人： Guoan WANG , Wayne H. WOODS, JR.
发明人： Guoan WANG , Wayne H. WOODS, JR.
IPC分类号： H01P1/18
CPC分类号： H01P9/00
摘要： An on-chip slow-wave structure that uses multiple parallel signal paths with grounded capacitance structures, method of manufacturing and design structure thereof is provided. The slow wave structure includes a plurality of conductor signal paths arranged in a substantial parallel arrangement. The structure further includes a first grounded capacitance line or lines positioned below the plurality of conductor signal paths and arranged substantially orthogonal to the plurality of conductor signal paths. A second grounded capacitance line or lines is positioned above the plurality of conductor signal paths and arranged substantially orthogonal to the plurality of conductor signal paths. A grounded plane grounds the first and second grounded capacitance line or lines.
摘要翻译：提供了采用具有接地电容结构的多个并行信号路径的片上慢波结构，其制造方法和设计结构。慢波结构包括以大致平行布置布置的多个导体信号路径。该结构还包括位于多个导体信号路径下方并且基本上正交于多个导体信号路径布置的第一接地电容线或线。第二接地电容线或线路位于多个导体信号路径上方并且基本上正交于多个导体信号路径布置。接地平面接地第一和第二接地电容线或线路。

6. 发明申请

US20120131776A1 DESIGN STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE 有权
标题翻译：提供带固定特性阻抗的片上可变延迟传输线的设计结构，结构和方法
公开(公告)号：US20120131776A1
公开(公告)日：2012-05-31
申请号：US13364569
申请日：2012-02-02
申请人： Hanyi DING , Wayne H. WOODS, JR.
发明人： Hanyi DING , Wayne H. WOODS, JR.
IPC分类号： H01L21/60
CPC分类号： H01P9/006 , H01L23/5222 , H01L23/5225 , H01L2924/0002 , H01L2924/3011 , Y10T29/41 , H01L2924/00
摘要： A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.
摘要翻译：一种用于提供具有固定特性阻抗的片上可变延迟传输线的设计结构，结构和方法。制造传输线结构的方法包括形成传输线结构的信号线，形成在传输线结构中引起第一延迟和第一特性阻抗的第一接地返回结构，以及形成第二接地返回结构，其导致传输线结构中的第二延迟和第二特性阻抗。第一延迟与第二延迟不同，第一特征阻抗基本上与第二特征阻抗相同。

7. 发明申请

US20120212303A1 METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER 有权
标题翻译：通过威尔肯森森电力公司通过硅的方法，结构和设计结构
公开(公告)号：US20120212303A1
公开(公告)日：2012-08-23
申请号：US13455725
申请日：2012-04-25
申请人： Hanyi DING , Alvin J. JOSEPH , Wayne H. WOODS, JR.
发明人： Hanyi DING , Alvin J. JOSEPH , Wayne H. WOODS, JR.
IPC分类号： H01P5/12 , G06F17/50 , H01L27/08
CPC分类号： G06F17/5077 , H01L23/481 , H01L2924/0002 , H01L2924/3011 , H01P5/16 , H01P11/007 , H01L2924/00
摘要： A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.
摘要翻译：一种通过硅通孔威尔金森功率分配器的方法，结构和设计结构。一种方法包括：在基板的第一侧上形成输入; 形成包括在所述基板中形成的第一穿通硅通孔的第一支脚，其中所述第一支路电连接所述输入端和第一输出端; 形成包括形成在所述基板中的第二通硅通孔的第二支脚，其中所述第二支脚电连接所述输入端和第二输出端，以及形成电连接在所述第一输出端和所述第二输出端之间的电阻器。

8. 发明申请

US20110049676A1 METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER 有权
标题翻译：通过威尔肯森森电力公司通过硅的方法，结构和设计结构
公开(公告)号：US20110049676A1
公开(公告)日：2011-03-03
申请号：US12548033
申请日：2009-08-26
申请人： Hanyi DING , Alvin J. JOSEPH , Wayne H. WOODS, JR.
发明人： Hanyi DING , Alvin J. JOSEPH , Wayne H. WOODS, JR.
IPC分类号： H01L23/538 , H01L21/02 , H01L21/768 , H01L29/86 , G06F17/50
CPC分类号： G06F17/5077 , H01L23/481 , H01L2924/0002 , H01L2924/3011 , H01P5/16 , H01P11/007 , H01L2924/00
摘要： A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.
摘要翻译：一种通过硅通孔威尔金森功率分配器的方法，结构和设计结构。一种方法包括：在基板的第一侧上形成输入; 形成包括在所述基板中形成的第一穿通硅通孔的第一支脚，其中所述第一支路电连接所述输入端和第一输出端; 形成包括形成在所述基板中的第二通硅通孔的第二支脚，其中所述第二支脚电连接所述输入端和第二输出端，以及形成电连接在所述第一输出端和所述第二输出端之间的电阻器。

9. 发明申请

US20120194302A1 STRUCTURE, STRUCTURE AND METHOD FOR PROVIDING AN ON-CHIP VARIABLE DELAY TRANSMISSION LINE WITH FIXED CHARACTERISTIC IMPEDANCE 有权
标题翻译：提供具有固定特性阻抗的片上可变延迟传输线的结构，结构和方法
公开(公告)号：US20120194302A1
公开(公告)日：2012-08-02
申请号：US13441245
申请日：2012-04-06
申请人： Hanyi DING , Wayne H. WOODS, JR.
发明人： Hanyi DING , Wayne H. WOODS, JR.
IPC分类号： H01P3/08 , G06F9/45
CPC分类号： H01P9/00 , H01P1/184
摘要： A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.
摘要翻译：一种用于提供具有固定特性阻抗的片上可变延迟传输线的设计结构，结构和方法。制造传输线结构的方法包括形成传输线结构的信号线，形成在传输线结构中引起第一延迟和第一特性阻抗的第一接地返回结构，以及形成第二接地返回结构，其导致传输线结构中的第二延迟和第二特性阻抗。第一延迟与第二延迟不同，第一特征阻抗基本上与第二特征阻抗相同。

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