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1. 发明授权

US07788446B2 System and method for drive-side guarantee of quality of service and for extending the lifetime of storage devices 有权
标题翻译：驱动端保证服务质量和延长存储设备使用寿命的系统和方法
公开(公告)号：US07788446B2
公开(公告)日：2010-08-31
申请号：US12021645
申请日：2008-01-29
申请人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
发明人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
IPC分类号： G06F12/00 , G11B27/36 , G11B21/02
CPC分类号： G11B27/36 , G11B20/10101 , G11B20/182 , G11B2020/1863
摘要： A storage device has a storage medium, a plurality of read-write mechanisms, a quality monitoring and book-keeping unit and a scheduling unit. The plurality of read-write mechanisms is coupled to the storage medium. The quality monitoring and book-keeping unit is coupled to the plurality of read-write mechanisms and is adapted to monitor at least one performance parameter associated with each read-write mechanism during operation. The scheduling unit is coupled to the quality monitoring and book-keeping unit. The scheduling unit is adapted to rank each of the plurality of read-write mechanisms according to the at least one performance parameter and to responsively schedule use of a read-write mechanism according to its rank.
摘要翻译：存储装置具有存储介质，多个读写机构，质量监视和记录单元以及调度单元。多个读写机构耦合到存储介质。质量监视和记录单元耦合到多个读写机构，并且适于在操作期间监视与每个读写机构相关联的至少一个性能参数。调度单元耦合到质量监视和记录单元。调度单元适于根据至少一个性能参数对多个读写机构中的每一个进行排序，并根据其等级响应地调度对读写机制的使用。

2. 发明申请

US20060210002A1 Timing recovery in a parallel channel communication system 有权
标题翻译：并行通道系统中的定时恢复
公开(公告)号：US20060210002A1
公开(公告)日：2006-09-21
申请号：US11070917
申请日：2005-03-03
申请人： Xueshi Yang , Mehmet Erden , Erozan Kurtas
发明人： Xueshi Yang , Mehmet Erden , Erozan Kurtas
IPC分类号： H04B1/10
CPC分类号： H04L7/0054 , G11B20/10009 , G11B20/10037 , G11B20/1403 , H04L7/0029 , H04L7/0062
摘要： A parallel channel timing recovery circuit. The parallel timing recovery circuit comprises multiple prefilters receiving parallel channel outputs and providing prefilter outputs. Multiple sampling filters receive the prefilter outputs and provide multiple discrete time signal samples. A self-timing circuit has multiple inputs receiving the multiple discrete time signal samples. The self-timing circuit provides a sampling control output to the sampling filters. The sampling control output is based on a composite of the multiple discrete time signal samples. Each of the sampling filters generates a discrete time signal sample based on the sampling control output and the prefilter outputs.
摘要翻译：并行通道定时恢复电路。并行定时恢复电路包括多个预滤波器，其接收并行通道输出并提供预滤波器输出。多个采样滤波器接收预滤波器输出并提供多个离散时间信号采样。自定时电路具有接收多个离散时间信号样本的多个输入。自定时电路为采样滤波器提供采样控制输出。采样控制输出基于多个离散时间信号样本的复合。每个采样滤波器基于采样控制输出和预滤波器输出产生离散时间信号采样。

3. 发明授权

US07333279B2 System and method for drive-side guarantee of quality of service and for extending the lifetime of storage devices 有权
标题翻译：驱动端保证服务质量和延长存储设备使用寿命的系统和方法
公开(公告)号：US07333279B2
公开(公告)日：2008-02-19
申请号：US11085845
申请日：2005-03-22
申请人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
发明人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
IPC分类号： G11B27/36 , G11B21/02
CPC分类号： G11B27/36 , G11B20/10101 , G11B20/182 , G11B2020/1863
摘要： A storage device has a storage medium, a plurality of read-write mechanisms, a quality monitoring and book-keeping unit and a scheduling unit. The plurality of read-write mechanisms is coupled to the storage medium. The quality monitoring and book-keeping unit is coupled to the plurality of read-write mechanisms and is adapted to monitor at least one performance parameter associated with each read-write mechanism during operation. The scheduling unit is coupled to the quality monitoring and book-keeping unit. The scheduling unit is adapted to rank each of the plurality of read-write mechanisms according to the at least one performance parameter and to responsively schedule use of a read-write mechanism according to its rank.
摘要翻译：存储装置具有存储介质，多个读写机构，质量监视和记录单元以及调度单元。多个读写机构耦合到存储介质。质量监视和记录单元耦合到多个读写机构，并且适于在操作期间监视与每个读写机构相关联的至少一个性能参数。调度单元耦合到质量监视和记录单元。调度单元适于根据至少一个性能参数对多个读写机构中的每一个进行排序，并根据其等级响应地调度对读写机制的使用。

4. 发明申请

US20060215290A1 System and method for drive-side guarantee of quality of service and for extending the lifetime of storage devices 有权
标题翻译：驱动端保证服务质量和延长存储设备使用寿命的系统和方法
公开(公告)号：US20060215290A1
公开(公告)日：2006-09-28
申请号：US11085845
申请日：2005-03-22
申请人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
发明人： Erozan Kurtas , Mehmet Erden , Xueshi Yang
IPC分类号： G11B27/36
CPC分类号： G11B27/36 , G11B20/10101 , G11B20/182 , G11B2020/1863
摘要： A storage device has a storage medium, a plurality of read-write mechanisms, a quality monitoring and book-keeping unit and a scheduling unit. The plurality of read-write mechanisms is coupled to the storage medium. The quality monitoring and book-keeping unit is coupled to the plurality of read-write mechanisms and is adapted to monitor at least one performance parameter associated with each read-write mechanism during operation. The scheduling unit is coupled to the quality monitoring and book-keeping unit. The scheduling unit is adapted to rank each of the plurality of read-write mechanisms according to the at least one performance parameter and to responsively schedule use of a read-write mechanism according to its rank.
摘要翻译：存储装置具有存储介质，多个读写机构，质量监视和记录单元以及调度单元。多个读写机构耦合到存储介质。质量监视和记录单元耦合到多个读写机构，并且适于在操作期间监视与每个读写机构相关联的至少一个性能参数。调度单元耦合到质量监视和记录单元。调度单元适于根据至少一个性能参数对多个读写机构中的每一个进行排序，并根据其等级响应地调度对读写机制的使用。

5. 发明授权

US07599450B2 Pattern-dependent equalization and detection 有权
标题翻译：模式相关的均衡和检测
公开(公告)号：US07599450B2
公开(公告)日：2009-10-06
申请号：US10771813
申请日：2004-02-03
申请人： Xueshi Yang , Erozan Kurtas
发明人： Xueshi Yang , Erozan Kurtas
IPC分类号： H03D1/00
CPC分类号： H04L25/03331 , H04L25/03191 , H04L25/03197
摘要： A system for pattern dependent equalization has an equalizer bank and a detector. The equalizer bank has a plurality of equalizers, which are each tuned to a selected data pattern. The detector may be a standard sequence detector or a modified Viterbi detector, which calculates the branch metric using a pattern dependent equalized output and a pattern-dependent target. A method of decoding data uses a pattern dependent equalizer bank. The pattern dependent equalizer bank processes a segment of a bit sequence to produce an equalized pattern-dependent output for each equalizer in parallel. The detector then detects the bit sequence using the branch metric calculation to select the smallest accumulated path metric.
摘要翻译：用于图形相关均衡的系统具有均衡器组和检测器。均衡器组具有多个均衡器，每个均衡器被调谐到选定的数据模式。检测器可以是标准序列检测器或修改的维特比检测器，其使用模式相关的均衡输出和与模式相关的目标来计算分支度量。数据解码的方法使用模式相关的均衡器组。模式相关均衡器组处理一个位序列的一个段，以平行地为每个均衡器产生均衡的模式相关输出。然后，检测器使用分支度量计算来检测比特序列，以选择最小的累积路径度量。

6. 发明申请

US20060233287A1 Jitter sensitive maximum-a-posteriori sequence detection 有权
标题翻译：抖动敏感最大后验序列检测
公开(公告)号：US20060233287A1
公开(公告)日：2006-10-19
申请号：US11105008
申请日：2005-04-13
申请人： Xueshi Yang , Erozan Kurtas , Rohit Negi , Xun Zhang
发明人： Xueshi Yang , Erozan Kurtas , Rohit Negi , Xun Zhang
IPC分类号： H03D1/00
CPC分类号： H04L25/03178 , G11B20/10046 , G11B20/10212
摘要： A channel detector has an anchor points inserter, a desired signal calculator, a distance calculator and a data detector. The anchor points inserter is adapted to choose values of expected transition locations for transition shifts within a received signal and to insert anchor points corresponding to the chosen values within a bit detection interval. The desired signal calculator is coupled to the anchor points inserter and is adapted to estimate desired signals corresponding to transition location information from the anchor points inserter. The distance calculator is coupled to the desired signal calculator and is adapted to generate a distance calculator output based on distances between the received signal and each of the desired signals. The data detector is coupled to the distance calculator and is adapted to identify a bit sequence corresponding to a desired signal having a minimum distance from the received signal. The data detector is adapted to generate an output based on the distance calculator output.
摘要翻译：信道检测器具有锚点插入器，期望的信号计算器，距离计算器和数据检测器。锚点插入器适于选择接收信号内的转变位移的预期转换位置的值，并且在位检测间隔内插入与所选择的值对应的锚定点。期望的信号计算器耦合到锚点插入器，并且适于估计对应于来自锚点插入器的转换位置信息的期望信号。距离计算器耦合到期望的信号计算器，并且适于基于接收信号和每个期望信号之间的距离产生距离计算器输出。数据检测器耦合到距离计算器，并且适于识别与从接收信号具有最小距离的期望信号相对应的比特序列。数据检测器适于基于距离计算器输出生成输出。

7. 发明授权

US07665007B2 Retrial and reread methods and apparatus for recording channels 有权
标题翻译：重读和重新读取频道的方法和设备
公开(公告)号：US07665007B2
公开(公告)日：2010-02-16
申请号：US10881398
申请日：2004-06-30
申请人： Xueshi Yang , Erozan Kurtas
发明人： Xueshi Yang , Erozan Kurtas
IPC分类号： H03M13/00
CPC分类号： G11B20/18 , G11B20/10009
摘要： A method of reading a data block from a sector of a recording media is described. The data block from the sector of the recording channel is decoded with an ECC decoder (first trial). The data block is re-decoded (second trial) using an adjusted timing recovery block that is adjusted based on the decoded data block, if the number of errors exceeded an error correction capability of the ECC decoder on the first trial. In one embodiment, the data block is reread from the same sector of the recording channel using the adjusted timing recovery block that is adjusted based on the re-decoded data block. The data block is subsequently jointly decoded with the waveforms obtained from the second trial by a possibly modified sequence detector, if the number of errors exceeded the error correction capability of the ECC decoder during the second trial.
摘要翻译：描述从记录介质的扇区读取数据块的方法。来自记录通道的扇区的数据块用ECC解码器解码（第一次试用）。如果第一次试验中ECC解码器的错误数量超过错误校正能力，则使用调整后的基于解码数据块调整的定时恢复块对数据块进行再解码（第二次试验）。在一个实施例中，使用经调整的定时恢复块，根据重新解码的数据块进行调整，从记录通道的相同扇区重新读取数据块。如果在第二次试验期间错误数超过了ECC解码器的纠错能力，则数据块随后由可能修改的序列检测器与从第二次试验获得的波形联合解码。

8. 发明申请

US20060002689A1 Retrial and reread methods and apparatus for recording channels 有权
标题翻译：重读和重新读取频道的方法和设备
公开(公告)号：US20060002689A1
公开(公告)日：2006-01-05
申请号：US10881398
申请日：2004-06-30
申请人： Xueshi Yang , Erozan Kurtas
发明人： Xueshi Yang , Erozan Kurtas
IPC分类号： H04N5/76 , H04N5/781
CPC分类号： G11B20/18 , G11B20/10009
摘要： A method of reading a data block from a sector of a recording media is described. The data block from the sector of the recording channel is decoded with an ECC decoder (first trial). The data block is re-decoded (second trial) using an adjusted timing recovery block that is adjusted based on the decoded data block, if the number of errors exceeded an error correction capability of the ECC decoder on the first trial. In one embodiment, the data block is reread from the same sector of the recording channel using the adjusted timing recovery block that is adjusted based on the re-decoded data block. The data block is subsequently jointly decoded with the waveforms obtained from the second trial by a possibly modified sequence detector, if the number of errors exceeded the error correction capability of the ECC decoder during the second trial.
摘要翻译：描述从记录介质的扇区读取数据块的方法。来自记录通道的扇区的数据块用ECC解码器解码（第一次试用）。如果第一次试验中ECC解码器的错误数量超过错误校正能力，则使用调整后的基于解码数据块调整的定时恢复块对数据块进行再解码（第二次试验）。在一个实施例中，使用经调整的定时恢复块，根据重新解码的数据块进行调整，从记录通道的相同扇区重新读取数据块。如果在第二次试验期间错误数超过了ECC解码器的纠错能力，则数据块随后由可能修改的序列检测器与从第二次试验获得的波形联合解码。

9. 发明申请

US20050169412A1 Pattern-dependent equalization and detection 有权
标题翻译：模式相关的均衡和检测
公开(公告)号：US20050169412A1
公开(公告)日：2005-08-04
申请号：US10771813
申请日：2004-02-03
申请人： Xueshi Yang , Erozan Kurtas
发明人： Xueshi Yang , Erozan Kurtas
IPC分类号： H04L25/03 , H04L27/06
CPC分类号： H04L25/03331 , H04L25/03191 , H04L25/03197
摘要： A system for pattern dependent equalization has an equalizer bank and a detector. The equalizer bank has a plurality of equalizers, which are each tuned to a selected data pattern. The detector may be a standard sequence detector or a modified Viterbi detector, which calculates the branch metric using a pattern dependent equalized output and a pattern-dependent target. A method of decoding data uses a pattern dependent equalizer bank. The pattern dependent equalizer bank processes a segment of a bit sequence to produce an equalized pattern-dependent output for each equalizer in parallel. The detector then detects the bit sequence using the branch metric calculation to select the smallest accumulated path metric.
摘要翻译：用于图形相关均衡的系统具有均衡器组和检测器。均衡器组具有多个均衡器，每个均衡器被调谐到选定的数据模式。检测器可以是标准序列检测器或修改的维特比检测器，其使用模式相关的均衡输出和与模式相关的目标来计算分支度量。数据解码的方法使用模式相关的均衡器组。模式相关均衡器组处理一个位序列的一个段，以平行地为每个均衡器产生均衡的模式相关输出。然后，检测器使用分支度量计算来检测比特序列，以选择最小的累积路径度量。

10. 发明授权

US09048879B1 Error correction system using an iterative product code 有权
标题翻译：纠错系统使用迭代产品代码
公开(公告)号：US09048879B1
公开(公告)日：2015-06-02
申请号：US13586710
申请日：2012-08-15
申请人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
发明人： Shaohua Yang , Zining Wu , Gregory Burd , Xueshi Yang , Hongwei Song , Nedeljko Varnica
IPC分类号： H03M13/29 , H04L1/00
CPC分类号： H03M13/2945 , H03M13/098 , H03M13/1102 , H03M13/1515 , H03M13/23 , H03M13/2909 , H03M13/2957 , H03M13/3746 , H04L1/0065
摘要： An error correction system includes an iterative code that employs an interleaved component code and an embedded parity component code. In some embodiments, on the transmission side, input signals received at an input node are encoded based on the interleaved code, which encodes an interleaved version of the input data to produce a first set of codewords. At least a portion of the first set of codewords preferably is divided into a plurality of symbols which are encoded based on the embedded parity code to provide encoded data. Similarly, in some embodiments, on the receiving side, received data are detected to produce detected information and soft outputs. The detected information is decoded based on the embedded parity code to obtain decoded information. The decoded information preferably is used, together with other soft information, by an interleaved decoder to generate reliability metrics for biasing a subsequent decoding iteration.
摘要翻译：纠错系统包括使用交织分量代码和嵌入奇偶校验分量代码的迭代代码。在一些实施例中，在传输侧，在输入节点处接收的输入信号基于交织的代码进行编码，该代码编码输入数据的交错版本以产生第一组码字。第一组码字的至少一部分优选地被划分为多个符号，这些符号基于嵌入的奇偶校验码被编码以提供编码数据。类似地，在一些实施例中，在接收侧，检测所接收的数据以产生检测到的信息和软输出。检测到的信息根据嵌入的奇偶校验码进行解码以获得解码的信息。解码的信息优选地与其他软信息一起被交织的解码器使用以产生用于偏置随后的解码迭代的可靠性度量。

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