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    • 1. 发明授权
    • Mechanism for an efficient DLL training protocol during a frequency change
    • 频率变化过程中有效的DLL训练协议的机制
    • US08645743B2
    • 2014-02-04
    • US12951788
    • 2010-11-22
    • Erik P. MachnickiHao ChenSanjay Mansingh
    • Erik P. MachnickiHao ChenSanjay Mansingh
    • G06F1/00
    • H03L7/07H03L7/0814
    • An efficient delay locked loop (DLL) training protocol during a frequency change includes an integrated circuit with a memory physical layer (PHY) unit that includes a master DLL and a slave DLL. The master DLL may delay a first reference clock by an amount, and provide a reference delay value corresponding to the delay amount. The slave DLL may delay a second reference clock by a second amount based upon a received configuration delay value. An interface unit may generate the configuration delay value based upon the reference delay value. A power management unit may provide an indication that the frequency of the second reference clock is changing. In response to receiving the indication, the interface unit may generate a new configuration delay value that corresponds to the new frequency using a predetermined scaling value and provide the new configuration delay value to the memory PHY unit.
    • 在频率变化期间,有效的延迟锁定环(DLL)训练协议包括具有包含主DLL和从属DLL的存储器物理层(PHY)单元的集成电路。 主DLL可以将第一参考时钟延迟一定量,并提供对应于延迟量的参考延迟值。 从属DLL可以基于接收的配置延迟值将第二参考时钟延迟第二量。 接口单元可以基于参考延迟值生成配置延迟值。 功率管理单元可以提供第二参考时钟的频率正在改变的指示。 响应于接收到指示,接口单元可以使用预定的缩放值来生成对应于新频率的新的配置延迟值,并向存储器PHY单元提供新的配置延迟值。
    • 2. 发明申请
    • Mechanism for an Efficient DLL Training Protocol During a Frequency Change
    • 频率变化期间高效率的DLL训练协议的机制
    • US20120126868A1
    • 2012-05-24
    • US12951788
    • 2010-11-22
    • Erik P. MachnickiHao ChenSanjay Mansingh
    • Erik P. MachnickiHao ChenSanjay Mansingh
    • H03L7/06
    • H03L7/07H03L7/0814
    • An efficient delay locked loop (DLL) training protocol during a frequency change includes an integrated circuit with a memory physical layer (PHY) unit that includes a master DLL and a slave DLL. The master DLL may delay a first reference clock by an amount, and provide a reference delay value corresponding to the delay amount. The slave DLL may delay a second reference clock by a second amount based upon a received configuration delay value. An interface unit may generate the configuration delay value based upon the reference delay value. A power management unit may provide an indication that the frequency of the second reference clock is changing. In response to receiving the indication, the interface unit may generate a new configuration delay value that corresponds to the new frequency using a predetermined scaling value and provide the new configuration delay value to the memory PHY unit.
    • 在频率变化期间,有效的延迟锁定环(DLL)训练协议包括具有包含主DLL和从属DLL的存储器物理层(PHY)单元的集成电路。 主DLL可以将第一参考时钟延迟一定量,并提供对应于延迟量的参考延迟值。 从属DLL可以基于接收的配置延迟值将第二参考时钟延迟第二量。 接口单元可以基于参考延迟值生成配置延迟值。 功率管理单元可以提供第二参考时钟的频率正在改变的指示。 响应于接收到指示,接口单元可以使用预定的缩放值来生成对应于新频率的新的配置延迟值,并向存储器PHY单元提供新的配置延迟值。
    • 10. 发明授权
    • Isolated dynamic current converters
    • 隔离式动态电流转换器
    • US09065321B2
    • 2015-06-23
    • US13726524
    • 2012-12-24
    • Deepakraj M. DivanAnish PrasaiHao Chen
    • Deepakraj M. DivanAnish PrasaiHao Chen
    • H02M3/335H02M1/00H02M7/02H02M5/00H02M7/42H02M5/22H02M7/23H02M7/48H02M7/493H02M5/458H02M1/12
    • H02M1/00H02M1/126H02M3/33576H02M5/00H02M5/225H02M7/02H02M7/23H02M7/42H02M7/4807H02M7/493
    • Isolated Dynamic-Current (“Dyna-C”) converters are converters that convert incoming 3-phase AC or DC power to a mix of DC and AC power via an isolation link. In various embodiments, the isolation link is a high-frequency isolation transformer. Isolated Dyna-C converters may provide a high-frequency galvanic isolation and are able to convert three-phase AC power to three-phase AC power, or three-phase AC power to DC and vice versa. The topology is minimal and the costs are low. Isolated Dyna-C converters provide fast current responses and keep the losses low by using a simplified two-stage conversion and providing a magnetizing current that is dynamically controllable and tailored to the load. An isolated Dyna-C converter may synthesize currents at its input or output ports with an arbitrary phase that is relative to the grid or load voltages, thereby enabling a full independent control over the active and reactive power at its ports.
    • 隔离式动态电流(“Dyna-C”)转换器是通过隔离链路将输入的三相交流或直流电源转换为直流和交流电源的转换器。 在各种实施例中,隔离链路是高频隔离变压器。 隔离式Dyna-C转换器可以提供高频电流隔离,并能够将三相交流电源转换为三相交流电,或将三相交流电转换为直流电,反之亦然。 拓扑结构很小,成本低。 隔离式Dyna-C转换器通过使用简化的两级转换提供快速电流响应并保持低损耗,并提供可动态控制并针对负载量身定制的励磁电流。 隔离的Dyna-C转换器可以在其输入或输出端口处以相对于电网或负载电压的任意相位合成电流,从而实现对其端口的有功功率和无功功率的完全独立控制。